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2a.1 2a.2 EE 457 Unit 2a Unsigned 2s Complement Sign and Zero Extension Fixed Point Systems and Arithmetic Hexadecimal Representation SIGNED AND UNSIGNED SYSTEMS 2a.3 2a.4 Signed Systems Unsigned and Signed Variables Several


  1. 2a.1 2a.2 EE 457 Unit 2a Unsigned 2’s Complement Sign and Zero Extension Fixed Point Systems and Arithmetic Hexadecimal Representation SIGNED AND UNSIGNED SYSTEMS 2a.3 2a.4 Signed Systems Unsigned and Signed Variables • Several systems have been used • Unsigned variables use unsigned binary (normal power-of-2 place values) to represent numbers – 2’s complement system – 1’s complement system 1 0 0 1 0 0 1 1 – Sign and magnitude 128 64 32 16 8 4 2 1 • Signed variables use the ____________ system (____________ weight) to represent numbers 1 0 0 1 0 0 1 1

  2. 2a.5 2a.6 2’s Complement System Zero and Sign Extension • Extension is the process of increasing the number of bits used • MSB has negative weight to represent a number without changing its value • MSB determines sign of the number Unsigned = Zero Extension (Always add leading 0’s): – 1 = negative – 0 = positive 111011 = 00111011 • To take the negative of a number Increase a 6-bit number to 8-bit number by zero extending (e.g. -7 => +7 or +2 => -2), requires __________ ____________________ 2’s complement = Sign Extension (Replicate sign bit): – This is accomplished by ______________________ 011010 = 00011010 pos. Sign bit is just repeated as many times as necessary x = -7 1001 110011 = 11110011 neg. 0110 Bit flip (1’s comp.) Add 1 + 1 0111 -x = -(-7) = +7 2a.7 2a.8 Zero and Sign Truncation Arithmetic & Sign • Truncation is the process of decreasing the number of bits used • You learned the addition (carry-method) and to represent a number without changing its value subtraction (borrow-method) algorithms in grade school Unsigned = Zero Truncation (Remove leading 0’s): • Consider A + B…do you definitely use the addition Decrease an 8-bit number to 6-bit number by truncating 0’s. Can’t 00111011 = 111011 algorithm? remove a ‘1’ because value is changed 2’s complement = Sign Truncation (Remove copies of sign bit): – What if A=(2), B=(-5)? pos. 00011010 = 011010 Any copies of the MSB can be removed without changing the numbers value. Be careful not to neg. 11110011 = 10011 change the sign by cutting off ALL the sign bits. • Human add/sub algorithm depends on ________!!

  3. 2a.9 2a.10 Unsigned and Signed Arithmetic Unsigned and Signed Subtraction • Addition/subtraction process is the same for • Subtraction process is the same for both both unsigned and signed numbers unsigned and signed numbers – Add columns right to left – Convert A – B to A + Comp. of B – Drop any final carry out – Drop any final carry out • This is the KEY reason we use 2’s complement • Examples: system to represent signed numbers If unsigned If signed • Examples: 1100 (12) (-4) - 0010 (2) (2) 1 1 If unsigned If signed 1001 + 0011 If unsigned If signed 1100 2a.11 2a.12 Overflow Unsigned Overflow • Overflow occurs when the result of an Overflow occurs when you cross arithmetic operation is too ____________ this discontinuity 0 +15 __________ with the given number of bits +1 0000 1111 0001 +14 +2 1110 0010 – Unsigned overflow (___) occurs when adding or +13 +3 1101 0011 subtracting unsigned numbers Plus 7 10 + 7 = 17 +12 1100 – Signed (2’s complement overflow) overflow ( ___ ) 0100 +4 4 - 6 = 14 occurs when adding or subtracting 2’s With 4-bit unsigned numbers we 10 1011 0101 +11 +5 can only represent 0 – 15. Thus, complement numbers 1010 0110 we say overflow has occurred. +10 1001 0111 +6 1000 +7 +9 +8

  4. 2a.13 2a.14 2’s Complement Overflow Testing for Overflow • Most fundamental test 0 – Check if answer is wrong (i.e. Positive + Positive yields a -1 +1 0000 1111 0001 negative) -2 +2 1110 0010 • Unsigned overflow ( C ) test -3 +3 1101 0011 – If _____________________________ 5 + 7 = +12 -4 1100 0100 +4 • Signed (2’s complement) overflow ( V ) test -6 + -4 = -10 – Only occurs if 1011 0101 -5 +5 With 4-bit 2’s complement 1010 • ____________________________ … or… 0110 numbers we can only represent -6 1001 0111 +6 • ____________________________ -8 to +7. Thus, we say overflow 1000 +7 -7 – Alternate test: See following slides has occurred. -8 Overflow occurs when you cross this discontinuity 2a.15 2a.16 Alternate Signed Overflow Test Overflow in Addition • Overflow occurs when the result of the A & B A3 B3 S3 C3 C4 V addition cannot be represented with the given 0 Both Positive 0 0 1 number of bits. 0 0 1 • Tests for overflow: 1 One Positive & One Negative – Unsigned: if Cout = 1 0 1 0 1 – Signed: if p + p = n or n + n = p 0 Both Negative 1 1 1 If unsigned If signed If unsigned If signed 1101 0110 + 0100 + 0101 • Check if _______________________________

  5. 2a.17 2a.18 Overflow in Subtraction Addition – Full Adders • Show the following addition operation • Overflow occurs when the result of the subtraction cannot be represented with the given number of bits. 0110 = X • Tests for overflow: + 0111 = Y – Unsigned: if Cout = 0 – Signed: if addition is p + p = n or n + n = p If unsigned If signed 0111 X Y X Y X Y X Y - 1000 Full Full Full Full C out C in C out C in C out C in C out C in Adder Adder Adder Adder S S S S If unsigned If signed 2a.19 2a.20 XOR Gate Review Performing Subtraction w/ Adders • To subtract X 0101 0101 = X Z – Flip bits of Y Y + 1100 - 0011 = Y 1 XOR 1101 – Add 1 0010 Z = X ⊕ Y X Y Z 0 0 0 0 1 1 X Y X Y X Y X Y 1 0 1 Full Full Full Full 1 1 0 C out C in C out C in C out C in C out C in Adder Adder Adder Adder S S S S True if an odd # of inputs are true 2 input case: True if inputs are different

  6. 2a.21 2a.22 XOR Conditional Inverter Adder/Subtractor • If one input (say, X) to an XOR gate is 0, • Using XOR gates X Y Z then Z=_____ before one set of 0 0 0 0 1 1 • If one input (say, X) to an XOR gate is 1, adder inputs we can 1 0 1 then Z=_____ 1 1 0 – Selectively pass or • Use one input as a control input which invert Y can conditionally pass or invert the – Add an extra ‘1’ via other input the Carry-in • If SUB/~ADD=0, – Z = X+Y • If SUB/~ADD=1, – Z = X-Y 2a.23 2a.24 Adder/Subtractor ALU Design • Exercise: Add Complete the ALU appropriate logic to design given the function table produce below – C (unsigned overflow) – V (signed overflow) OP[2:0] Z flags 000 X+Y 001 X-Y 011 SLT: Z=1, if X<Y Z=0, other 100 AND 110 OR Others Z = und.

  7. 2a.25 2a.26 Hexadecimal Representation • Since values in modern computers are many bits, we use hexadecimal as a shorthand notation (4 bits = 1 hex digit) – 11010010 = D2 hex – 0111011011001011 = 76CB hex • To interpret the value of a hex number, you must know what underlying binary system is NON-REQUIRED MATERIAL assumed (unsigned, 2’s comp. etc.) 2a.27 2a.28 Translating Hexadecimal Taking the 16’s Complement • Hex place values (16 2 , 16 1 , 16 0 ) can ONLY be used if • Taking the 2’s complement of a binary number yields the number is positive. its negative and is accomplished by finding the 1’s • If hex represents unsigned binary simply apply hex complement (bit flip) and adding 1 place values • Taking the 16’s complement of a hex number yields – B2 hex = 11*16 1 + 2*16 0 = 178 10 its negative and is accomplished by finding the 15’s • If hex represents signed value (2’s comp.) complement and adding 1 – First determine the sign to be pos. or neg. • Convert the MS-hex digit to binary to determine the MSB (e.g. for – 15’s complement is found by subtracting each digit of the B2 hex, B=1011 so since the MSB=1, B2 is neg.) hex number from F 16 • In general, hex values starting 0-7 = pos. / 8-F = neg. – If pos., apply hex place values (as if it were unsigned) Original value B2: FF - B2 Subtract each digit from F – If neg., take the 16’s complement and apply hex place 4D 15’s comp. of B2 values to find the neg. number’s magnitude + 1 Add 1 16’s comp. of B2: 4E 16’s comp. of B2

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