CSEE 4823 Advanced Logic Design Handout: Lecture #9 10/4/16 Prof. - PDF document

Dec 21, 2022 •131 likes •188 views

CSEE 4823 Advanced Logic Design Handout: Lecture #9 10/4/16 Prof. Steven M. Nowick nowick@cs.columbia.edu Department of Computer Science (and Elect. Eng.) Columbia University New York, NY, USA Ripple-Carry Adders (RCA] 1 Basic Building

CSEE 4823 Advanced Logic Design Handout: Lecture #9 10/4/16 Prof. Steven M. Nowick nowick@cs.columbia.edu Department of Computer Science (and Elect. Eng.) Columbia University New York, NY, USA Ripple-Carry Adders (RCA] 1
Basic Building Blocks: Half Adder (HA) Purpose: add two 1-bit operands with no carry-in xi yi xi yi si cout 0 0 0 0 cout 0 1 1 0 1 0 1 0 1 1 0 1 Truth Table si xi cout = xi yi cout yi si = xi XOR yi xi si yi #3 Basic Building Blocks: Full Adder (FA) Purpose: add two 1-bit operands with carry-in xi yi cin xi yi si cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 cout cin 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Truth Table si xi cout = xi yi + xi cin + yi cin yi = MAJORITY Function xi cout cin si = xi XOR yi XOR cin xi yi = ODD PARITY Function si yi cin cin #4 2
Ripple-Carry Adder (RCA): 8-Bit Example Purpose: add two N-bit operands X Y 8 8 Top-level block view: cout cin 8 S x7 y7 x6 y6 x5 y5 x4 y4 x3 y3 x2 y2 x1 y1 x0 y0 c7 c6 c5 c4 c3 c2 c1 cout cin FA FA FA FA FA FA FA FA s7 s6 s5 s4 s3 s2 s1 s0 Detailed structural view: #5 Ripple-Carry Adder (RCA): Simulations Example #1: best-case = no carry chain (all carries are 0) Addition: 00110010 = 49 + 00000100 = 4 00110110 = 53 x7 y7 x6 y6 x5 y5 x4 y4 x3 y3 x2 y2 x1 y1 x0 y0 c7 c6 c5 c4 c3 c2 c1 cout cin FA FA FA FA FA FA FA FA s7 s6 s5 s4 s3 s2 s1 s0 #6 3
Ripple-Carry Adder (RCA): Simulations Example #2: worst-case = longest carry chain (all carries are 1) Addition: 00000001 = 1 + 11111111 = -1 (2s Complement Representation) 00000000 = 0 x7 y7 x6 y6 x5 y5 x4 y4 x3 y3 x2 y2 x1 y1 x0 y0 c7 c6 c5 c4 c3 c2 c1 cout cin FA FA FA FA FA FA FA FA s7 s6 s5 s4 s3 s2 s1 s0 #7 4

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