Chapter 5: Unfolding Keshab K. Parhi
• Unf olding ≡ P arallel P rocessing 2-unfolded (1) (1) (1) B 0,2,4,… . A (1) B 0 A 0 2D T ’ ∞ = 2ut D A 0 � B 0 => A 2 � B 2 => A 4 � B 4 => … .. A 1 � B 1 => A 3 � B 3 => A 5 � B 5 => … .. 1,3,5,… . (1) (1) B 1 2 nodes & 2 edges A 1 T ∞ = (1+1)/ 2 = 1ut T ’ ∞ = 2ut D 4 nodes & 4 edges T ∞ = 2/ 2 = 1ut • I n a ‘ J ’ unf olded syst em each delay is J -slow => if input t o a delay element is t he signal x ( kJ + m ), t he out put is x (( k-1 ) J + m ) = x ( kJ + m – J ). Chap. 5 2
• Algorit hm f or unf olding: � For each node U in t he original DFG, draw J node U 0 , U 1 , U 2 ,… , U J -1 . � For each edge U → V wit h w delays in t he original DFG, draw t he J edges U i → V ( i + w )% J wit h ( i+w )/ J delays f or i = 0, 1, … , J -1. V 0 U 0 9D 37D U V 9D V 1 U 1 w = 37 U 2 ⇒ ( i+w )/ 4 = 9, i = 0,1,2 V 2 9D = 10, i = 3 U 3 V 3 10D � Unf olding of an edge wit h w delays in t he original DFG produces J -w edges wit h no delays and w edges wit h 1delay in J unf olded DFG f or w < J . � Unf olding preserves precedence const raint s of a DSP program. Chap. 5 3
2D 2D D V 0 T 0 U 0 V U 3-unf olded 6D 5D 2D V 1 U 1 T 1 T DFG 2D 2D D T 2 U 2 V 2 D P ropert ies of unf olding : � Unf olding preserves t he number of delays in a DFG. This can be st at ed as f ollows: w / J + ( w+1 )/ J + … + ( w + J - 1 )/ J = w � J -unf olding of a loop l wit h w l delays in t he original DFG leads t o gcd ( w l , J ) loops in t he unf olded DFG, and each of t hese gcd ( w l , J ) loops cont ains w l / gcd ( w l , J ) delays and J / gcd ( w l , J ) copies of each node t hat appears in l. � Unf olding a DFG wit h it erat ion bound T ∞ result s in a J - unf olded DFG wit h it erat ion bound J T ∞ . Chap. 5 4
• Applicat ions of Unf olding � Sample Period Reduct ion � Parallel Processing • Sample Period Reduct ion � Case 1 : A node in t he DFG having comput at ion t ime great er t han T ∞ . � Case 2 : I t erat ion bound is not an int eger. � Case 3 : Longest node comput at ion is larger t han t he it erat ion bound T ∞ , and T ∞ is not an int eger. Chap. 5 5
Case 1 : � The original DFG cannot have sample period equal t o t he it erat ion bound because a node comput at ion t ime is more t han it erat ion bound � I f t he comput at ion t ime of a node ‘U’, t u , is great er t han t he it erat ion bound T ∞ , t hen t u / T ∞ - unf olding should be used. � I n t he example, t u = 4, and T ∞ = 3, so 4/ 3 - unf olding i.e., 2- unf olding is used. Chap. 5 6
• Case 2 : � The original DFG cannot have sample period equal t o t he it erat ion bound because t he it erat ion bound is not an int eger. � I f a crit ical loop bound is of t he f orm t l / w l where t l and w l are mut ually co-prime, t hen w l -unf olding should be used. � I n t he example t l = 60 and w l = 45, t hen t l / w l should be writ t en as 4/ 3 and 3-unf olding should be used. •Case 3 : I n t his case t he minimum unf olding f act or t hat allows t he it erat ion period t o equal t he it erat ion bound is t he min value of J such t hat JT ∞ is an int eger and is great er t han t he longest node comput at ion t ime. Chap. 5 7
• Parallel Processing : � Word- Level P arallel P rocessing � Bit Level P arallel processing � Bit -serial processing � Bit -parallel processing � Digit -serial processing Chap. 5 8
• Bit -Level Parallel Processing a 0 b 0 a 1 b 1 Bit -parallel a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 Bit -serial a 2 b 2 a 3 b 3 a 2 a 0 b 2 b 0 Digit -Serial (Digit -size = 2) a 3 a 1 b 3 b 1 a 3 a 2 a 1 a 0 s 3 s 2 s 1 s 0 Bit -serial b 3 b 2 b 1 b 0 adder D 4l+1,2,3 4l+0 0 Chap. 5 9
• The f ollowing assumpt ions are made when unf olding an edge U → V : � The wordlengt h W is a mult iple of t he unf olding f act or J , i.e. W = W’J . � All edges int o and out of t he swit ch have no delays. • Wit h t he above t wo assumpt ions an edge U → V can be unf olded as f ollows : � Writ e t he swit ching inst ance as Wl + u = J ( W’l + u/ J ) + (u%J ) � Draw an edge wit h no delays in t he unf olded graph f rom t he node U u%J t o t he node V u%J , which is swit ched at t ime inst ance ( W’l + u/ J ) . Chap. 5 10
Example : 4 l + 3 U 0 V 0 12 l + 1, 7, 9, 11 4 l + 0,2 Unf olding by 3 U V U 1 V 1 4 l + 3 U 2 V 2 To unf old t he DFG by J =3, t he swit ching inst ances are as f ollows 12 l + 1 = 3(4 l + 0) + 1 12 l + 7 = 3(4 l + 2) + 1 12 l + 9 = 3(4 l + 3) + 0 12 l + 11 = 3(4 l + 3) + 2 Chap. 5 11
• Unf olding a DFG cont aining an edge having a swit ch and a posit ive number of delays is done by int roducing a dummy node. 2D 2D 6 l + 1, 5 6 l + 1, 5 A A D I nsert ing C C Dummy node B 6 l + 0, 2, 3, 4 B 6 l + 0, 2, 3, 4 A 0 D 0 2 l + 0 D C B 0 C 2 l + 1 0 0 D 1 A 1 D D A 2 2 l + 0 2 l + 0 D 2 A 2 C C 1 1 B 1 B 0 2 l + 1 2 l + 1 2 l + 0 B 2 2 l + 1 B 1 C C 2 2 B 2 A 0 2 l + 0 2 l + 1 Chap. 5 12
• I f t he word-lengt h, W, is not a mult iple of t he unf olding f act or, J , t hen expand t he swit ching inst ances wit h periodicit y lcm(W,J ) • Example: Consider W=4, J =3. Then lcm(4,3) = 12. For t his case, 4l = 12l + {0,4,8), 4l+1 = 12l + {1,5,9}, 4l+2 = 12l + {2,6,10}, 4l+3 = 12l + {3,7,11}. All new swit ching inst ances are now mult iples of J =3. Chap. 5 13
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