Challenges & Strategies for the SPICE Model Extraction & - PowerPoint PPT Presentation

Challenges & Strategies for the SPICE Model Extraction & Simulation of the PD-SOI Technology Jung- Suk Goo Compact Modeling & Characterization Group Microprocessor Solutions Sector, Sunnyvale, CA Advanc e d Mic r o De vic e s

Outline ! Bulk CMOS vs. PD-SOI CMOS Self-heating ! Floating-Body Modeling: History-Effect ! ! Definition ! Underlying Physics ! Key Components & Their Impacts ! Parameter Extraction Flow ! Challenges in Measurement & Extraction Tied-Body Modeling ! ! History–Effect in Tied-Body CMOS ! Parasitic Gate Capacitance ! Distributed Body Resistance Conclusion ! 2 20/ 09/ 05 MOS-AK 2005

Outline ! Bulk CMOS vs. PD-SOI CMOS Self-heating ! Floating-Body Modeling: History-Effect ! ! Definition ! Underlying Physics ! Key Components & Their Impacts ! Parameter Extraction Flow ! Challenges in Measurement & Extraction Tied-Body Modeling ! ! History–Effect in Tied-Body CMOS ! Parasitic Gate Capacitance ! Distributed Body Resistance Conclusion ! 3 20/ 09/ 05 MOS-AK 2005

Bulk CMOS vs. PD-SOI CMOS Bulk CMOS PD- SOI CMOS Identical body potential Independent body potential The chief difference of the PD-SOI is that the body of each SOI transistor is an ! independent 4 th terminal for the device ! When absolutely needed, the body can be fixed to a chosen potential with a body tie: Transistor Transistor with body with body Floating Floating tie tie Body Body Transistor Transistor ! However, in 99.9% of the chip, transistors will be operating as floating body devices 4 20/ 09/ 05 MOS-AK 2005

Self-Heating 1.5E-3 1.5E-3 1.5E-3 without self-heating without self-heating without self-heating with self-heating with self-heating with self-heating Drain Current (A/um) Drain Current (A/um) Drain Current (A/um) 1.2E-3 1.2E-3 1.2E-3 Vgs=2.0 V Vgs=2.0 V Vgs=2.0 V 9E-4 9E-4 9E-4 Vgs=1.5 V Vgs=1.5 V Vgs=1.5 V 6E-4 6E-4 6E-4 Vgs=1.0 V Vgs=1.0 V Vgs=1.0 V 3E-4 3E-4 3E-4 Vgs=0.5 V Vgs=0.5 V Vgs=0.5 V 0 0 0 0 0 0 0.4 0.4 0.4 0.8 0.8 0.8 1.2 1.2 1.2 1.6 1.6 1.6 2 2 2 Drain Voltage(V) Drain Voltage(V) Drain Voltage(V) Thermal conductivity ! ! K si = 60 - 148W/mK Cth Rth Po we r K ox = 0.2 - 1.2W/mK ! Relatively poor modeling ! ! Occasional convergence issue 5 20/ 09/ 05 MOS-AK 2005

Outline ! Bulk CMOS vs. PD-SOI CMOS Self-heating ! Floating-Body Modeling: History-Effect ! ! Definition ! Underlying Physics ! Key Components & Their Impacts ! Parameter Extraction Flow ! Challenges in Measurement & Extraction Tied-Body Modeling ! ! History–Effect in Tied-Body CMOS ! Parasitic Gate Capacitance ! Distributed Body Resistance Conclusion ! 6 20/ 09/ 05 MOS-AK 2005

CMOS Inverter Operation 7 20/ 09/ 05 MOS-AK 2005

Definition of History-Effect τ 2nd History-effect H = ( τ 1st – τ 2nd ) / τ 2nd τ 1st ! 1st switch: input transition after being held constant for a long time. ! 2nd switch: input transition short time after the 1st switch. 8 20/ 09/ 05 MOS-AK 2005

Typical History-Effect E volution of Switc hing De lay Input Cloc k Shape 15 1 st SW 14 Delay/Stage [ps] 13 12 2 nd SW Dynamic t r =t f =0.8ns Ste ady 11 t per =40ns (50% duty) State step=100ps 10 -10 -9 -8 -7 -6 -5 -4 10 10 10 10 10 10 10 Time [s] ! Delay is subject to switching history of the logic gate. 9 20/ 09/ 05 MOS-AK 2005

What Causes History-Effect? ! Body Potential is a function of: ! Capacitive coupling to ! Source ! Drain Source Drain ! Gate ! Substrate (small) ! Diode Leakages to Buried Oxide ! Source ! Drain ! Gate Leakage Substrate ! Impact Ionization Also subject to the previous ! switching history 10 20/ 09/ 05 MOS-AK 2005

Combined Capacitive/Resistive Network C1 R1 C-Divider Vo ltag e C2 R2 RC Decay R-Divider T ime 11 20/ 09/ 05 MOS-AK 2005

Time for Actual Contribution to Speed Initial DC Capacitive Conditions Coupling 1 st SW : Initial DC ! 2 nd SW : Initial DC + Capacitive Coupling ! 12 20/ 09/ 05 MOS-AK 2005

Capacitive Coupling Gate Drain Gate Drain Coupling Coupling Coupling Coupling ! Capacitive coupling is stronger to drain than to gate. 13 20/ 09/ 05 MOS-AK 2005

Key Components (Initial DC Condition) 2 nd SW 2 nd SW st SW st SW 1 1 I gb,acc I gb,acc I dio,rev I dio,rev I dio,for I dio,for I gb,inv I gb,inv I dio,for I dio,for 1 st SW Initial ! KCL balance between forward and reverse I diode ! ! Accumulation I gb is much smaller than forward I diode 2 nd SW Initial ! ! KCL balance between forward I diode *2 and inversion I gb 14 20/ 09/ 05 MOS-AK 2005

Key Components (AC Coupling) V DD V DD C j,rev C j,rev C ∆ = j , rev V V + + + + bs DD C C C gb , acc j , for j , rev C j,for C j,for C gb,acc C gb,acc ∆ V b ∆ V b - - ! Basically a voltage-divider that consists of: ! gate-body capacitance and junction capacitance ! Drain AC coupling is more significant than gate AC coupling 15 20/ 09/ 05 MOS-AK 2005

Key Components (Body-Effect) V t vs. V body Diode current V t & Gate current V body speed Gate capacitance Junction capacitance ! Body potential is established mostly by diode and gate characteristics (DC & AC). This body potential is translated into the actual switching ! performance by the body-effect (the main transfer function). 16 20/ 09/ 05 MOS-AK 2005

Impact of Gate Capacitance & Current Inve r sion I gb Impac t Inve r sion C gb Impac t 30 30 25 25 20 20 nd [%] nd [%] 15 15 10 10 nd )/2 nd )/2 5 5 st -2 st -2 Increasing Increasing 0 0 (1 (1 inversion I gb accumulation C gb -5 -5 2 nd V b ↑ 2 nd V b ↓ -10 -10 0.8 1.0 1.2 1.4 1.6 0.8 1.0 1.2 1.4 1.6 V DD [V] V DD [V] ! Cgb is critical for V DD dependence slope ! Igb is a major factor in 130nm technology and below C ∆ = db V V + + b , 2 nd DD C C C gb sb db 17 20/ 09/ 05 MOS-AK 2005

Impact of Diode Current F or war d I diode L e ve l Impac t Re ve r se I diode Impac t 30 30 25 25 20 20 nd [%] nd [%] 15 15 10 10 nd )/2 nd )/2 5 5 st -2 st -2 Increasing Increasing 0 0 (1 (1 forward I diode reverse I diode -5 -5 1 st V b ↓↓ 2 nd V b ↓ 1 st V b ↑ -10 -10 0.8 1.0 1.2 1.4 1.6 0.8 1.0 1.2 1.4 1.6 V DD [V] V DD [V] ! The diode current characteristic is the key characteristic dominating the V DD and temperature dependences of the history-effect: ! Proportional to forward Idiode Inversely proportional to reverse Idiode ! 18 20/ 09/ 05 MOS-AK 2005

Outline ! Bulk CMOS vs. PD-SOI CMOS Self-heating ! Floating-Body Modeling: History-Effect ! ! Definition ! Underlying Physics ! Key Components & Their Impacts ! Parameter Extraction Flow ! Challenges in Measurement & Extraction Tied-Body Modeling ! ! History–Effect in Tied-Body CMOS ! Parasitic Gate Capacitance ! Distributed Body Resistance Conclusion ! 19 20/ 09/ 05 MOS-AK 2005

Do History-Effect Modeling First! Intr insic MOSF E T Par asitic Charac te ristic s Charac te ristic s I Dsat , I o ff , V t , … I dio de , I g b , … History E ffe c t ! Intrinsic MOSFET characteristics has only small impact on history effect. 20 20/ 09/ 05 MOS-AK 2005

PD-SOI Parameter Extraction Procedure ffe c t & Cg F itting Body- E Tied Ve ry Crude IV F itting Body e nts F itting Body Cur r (I dio de , I g b , e tc ) Che c k History E ffe c t Floating Body Re fine All IV F itting 21 20/ 09/ 05 MOS-AK 2005

Challenges in Measurement & Extraction Ac tive Ga te Po ly P+ I / I Parasitic Opposite Type Gate P+ N+ P+ P w/ halo ST I P- Neck Easily Gets Fully-Depleted 22 20/ 09/ 05 MOS-AK 2005

Parasitic Opposite-Type Gate nMOS pMOS -6 -6 1x10 1x10 Bulk BT/SOI Bulk BT/SOI -7 -7 1x10 1x10 I GG I GG I GB I GB -8 -8 1x10 1x10 Gate Current [A] Gate Current [A] -9 -9 1x10 1x10 -10 -10 1x10 1x10 -11 -11 10 10 -12 -12 10 10 -13 -13 10 10 -14 -14 10 10 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 V G [V] V G [V] ! Big discrepancy in Igb characteristic due to the parasitic Especially in inversion region ! ! Need a bulk wafer 23 20/ 09/ 05 MOS-AK 2005

Fully-Depleted Neck Body- E ffe c t Junc tion Capac itanc e 0.5 1.5 0.4 V DS =0.1V 1.0 C Junction [pF] 0.3 V T [V] 0.2 V DS =1.2V 0.5 0.1 nMOSFET 2/0.0875 µ m 0.0 0.0 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 -1.0 -0.5 0.0 0.5 V bs [V] V bias [V] ! Low-doping neck can cause artifacts in measured data 24 20/ 09/ 05 MOS-AK 2005

Back-Bias Range of Interest T ie d Body F loating & Bulk Body 0.5 Re ve r se 0.4 V DS =0.1V 0.3 V T [V] 0.2 V DS =1.2V F or war d 0.1 nMOSFET 2/0.0875 µ m 0.0 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 V bs [V] ! Sometimes the body effect is not able to fit for the entire range. ! Then some range should be compromised. ! Separating TB and FB models maybe more desirable. 25 20/ 09/ 05 MOS-AK 2005

Outline ! Bulk CMOS vs. PD-SOI CMOS Self-heating ! Floating-Body Modeling: History-Effect ! ! Definition ! Underlying Physics ! Key Components & Their Impacts ! Parameter Extraction Flow ! Challenges in Measurement & Extraction Tied-Body Modeling ! ! History–Effect in Tied-Body CMOS ! Parasitic Gate Capacitance ! Distributed Body Resistance Conclusion ! 26 20/ 09/ 05 MOS-AK 2005