Announcements • Reading assignments – 7 th Edition, Section 13.4 CSE 311 Foundations of – 6 th Edition, Section 12.4 Computing I • Homework 7 due today Lecture 24 • Homework 8 out Friday, due Friday, June 7 FSM Limits, Connection to Circuits • Final exam, Monday June 10. Room TBA. Spring 2013 Study materials out Friday/Monday. 1 2 Last lecture highlights Last lecture highlights • NFAs from Regular Expressions • “Subset construction”: NFA to DFA 0,1 (01 ∪ ∪ 1)*0 0 ∪ ∪ ∅ ∅ ∅ ∅ a,b a 0 λ λ λ λ 1 1 λ λ λ λ λ λ λ λ 0 1 λ λ λ λ λ λ λ λ λ λ λ λ 0 1 1 b λ λ λ λ c λ λ λ λ 0 λ λ λ λ λ λ λ λ b c 1 1 0 0 0 0,1 1 b,c a,b,c 0 NFA DFA 3 4
1 in third position from end Redrawing 1 0,1 0,1 1 0,1 0,1 D D A B C A B C 0,1 0,1 1 1 {A, B, C, D} {A, B, C} 0 1 0 1 {A,B} {A,B,C} {A, C, D} 0 0 1 1 1 1 1 {A} {A, B} 1 1 0 0 1 1 0 {A,B,C,D} 0 {A} {A, B, D} {A,C} {A,B,D} 1 0 0 {A, C} 0 1 0 0 0 1 {A, D} {A,D} {A,C,D} 0 0 5 6 DFAs ≡ Regular Expressions Generalized NFAs • Like NFAs but allow We have shown how to build an optimal DFA for – Parallel edges every regular expression – Regular Expressions as edge labels – Build NFA • NFAs already have edges labeled λ λ or a λ λ – Convert NFA to DFA using subset construction • An edge labeled by A can be followed by reading a – Minimize resulting DFA string of input chars that is in the language represented by A • A string x is accepted iff there is a path from start to Theorem: A language is recognized by a DFA iff it final state labeled by a regular expression whose has a regular expression language contains x 7 8
Starting from NFA Only two simplification rules: • Rule 1 : For any two states q 1 and q 2 with • Add new start state and final state parallel edges (possibly q 1 =q 2 ), replace λ λ λ λ A λ λ λ λ A ⋃ ⋃ ⋃ ⋃ B q 2 by q 2 q 1 q 1 λ λ λ λ B • Rule 2 : Eliminate non-start/final state q 3 by • Then eliminate original states one by one, replacing all keeping the same language, until it looks like: B A A C AB*C q 1 q 3 q 2 by q 2 q 1 • Final regular expression will be A for every pair of states q 1 , q 2 (even if q 1 =q 2 ) 9 10 Converting an NFA to a regular Splicing out a node expression • Consider the DFA for the mod 3 sum • Label edges with regular expressions – Accept strings from {0,1,2}* where the digits mod 0 t 0 → t 1 → t 0 : 10*2 3 sum of the digits is 0 t 0 → t 1 → t 2 : 10*1 t 1 t 2 → t 1 → t 0 : 20*2 t 2 → t 1 → t 2 : 20*1 1 s 0 1 λ 2 2 0 0 2 t 1 t 0 t 2 1 1 λ 1 2 2 0 f 0 2 t 0 t 2 1 11 12
Finite Automaton without t 1 What can Finite State Machines do? s λ • We’ve seen how we can get DFAs to recognize R 1 : 0 ∪ 10*2 R 4 R 2 R 2 : 2 ∪ 10*1 R 1 all regular languages t 0 t 2 R 3 : 1 ∪ 20*2 R 3 R 4 : 0 ∪ 20*1 λ • What about some other languages we can f generate with CFGs? s R 5 : R 1 ∪ R 2 R 4 *R 3 λ – { 0 n 1 n : n≥0 }? λ R 5 f t 0 – Binary Palindromes? – Strings of Balanced Parentheses? Final regular expression: (0 ∪ 10*2 ∪ (2 ∪ 10*1)(0 ∪ 20*1)*(1 ∪ 20*2))* 13 14 A={0 n 1 n : n ≥ 0 } cannot be recognized The set B of binary palindromes by any DFA cannot be recognized by any DFA Consider the infinite set of strings Consider the infinite set of strings λ , 0, 00, 000, 0000, ...}={0 n : n ≥ 0} S={ λ λ λ S={ λ λ , 0, 00, 000, 0000, ...} λ λ Claim: No two strings in S can end at the same Claim: No two strings in S can end at the same state of any DFA for B state of any DFA for A Proof: Suppose n ≠ m and 0 n and 0 m end at the same state p. Proof: Suppose n ≠ m and 0 n and 0 m end at the same state p. Since 0 n 10 n is in B, following 10 n after state p must Since 0 n 1 n is in A, following 1 n after state p must lead to a final state. lead to a final state. But then the DFA would accept 0 m 10 n which is not in B But then the DFA would accept 0 m 1 n and is a contradiction since the DFA recognizes B. which is a contradiction to the DFA recognizing A. Given claim, the # of states of any DFA for A must be ≥ |S| Given claim, the # of states of any DFA for A must be ≥ |S| which is not finite, which is impossible for a DFA. which is not finite, which is impossible for a DFA. 15 16
FSMs in Hardware The set P of strings of balanced parentheses cannot be recognized by any DFA • Encode the states in binary: e.g. states 0,1,2,3 • What infinite set of simple strings can we represented as 000,100, 010,001, or as 00,01,10,11. choose that all must go to different states? • Encode the input symbols as binary signals • Encode the outputs possible as binary signals • Build combinational logic circuit to compute • For each pair of strings in this set what transition function: common extension should we choose that shows that they can’t go to the same state? current state Boolean Circuit for next state State Transition Function output signals input signals 17 18 FSMs in Hardware Example: 1-bit Full Adder • C ombine with sequential logic for A B input signals – Registers to store bits of state – Clock pulse 1-Bit Full Adder • At start of clock pulse, current state bits from A registers and input signals are released to the circuit B • At end of clock pulse, output bits are produced and A Cout Cin next state bits are stored back in the same registers current state next state B C in C out Cin A current state next state Boolean Circuit for B Sum Cin State Transition Function output signals input signals output Sum 19 20
FSM for binary addition using output FSM for binary addition on edges • Assume that the two integers are a n-1 ...a 2 a 1 a 0 and • Assume that the two integers are a n-1 ...a 2 a 1 a 0 and b n-1 ...b 2 b 1 b 0 and bits arrive together as [a 0 ,b 0 ] then b n-1 ...b 2 b 1 b 0 and bits arrive together as [a 0 ,b 0 ] then [a 1 ,b 1 ] etc. [a 1 ,b 1 ] etc. s [0,0]: 0 [1,1]: 1 [1,1]: 0 [0,1],[1,0] C out =0 C out =1 [1,1] [0,1],[1,0] [1,1] [0,0]: 1 C out =0 C out =0 C out =1 C out =1 [0,1],[1,0]: 1 [0,1],[1,0]: 0 0 1 0 1 [0,0] [0,0] [0,1],[1,0] [0,0] [0,1],[1,0] [0,1],[1,0] [1,1] [1,1] Generate a carry of 1 [0,1],[1,0] Propagate a carry of 1 if it was already there [0,0] [1,1] Generate a carry of 1 21 22 [0,1],[1,0] Propagate a carry of 1 if it was already there FSMs without sequential logic A 2-bit ripple-carry adder a b • What if the entire input bit-strings are a 0 b 0 a 1 b 1 available at all once at the start? 1-Bit Full Adder – E.g. 64-bit binary addition A B C in C out C in C out 0 • Don’t want to wait for 64 clock cycles to A Cout Cin compute the output! B C in C out Cin Sum 0 Sum 1 • Suppose all input strings have length n A B – Can chain together n copies of the state transition Sum Cin circuit as one big combinational logic circuit Sum 23 24
Problem with Chaining Transition Carry-Look-Ahead Adder Circuits Compute generate G i = a i ∧ b i [1,1] • Resulting Boolean circuit is “deep” propagate P i =a i ⊕ b i [0,1],[1,0] • There is a small delay at each gate in a These determine transition and output functions Boolean circuit – Carry C i =G i ∨ � P i ∧ C i-1 ) also written C i =G i +P i C i-1 – The clock pulse has to be long enough so that all – Sum i = P i ⊕ C i-1 combinational logic circuits can be evaluated Unwinding, we get during a single pulse C 0 =G 0 C 1 =G 1 +G 0 P 1 C 2 =G 2 +G 1 P 2 +G 0 P 1 P 2 – Deep circuits mean slow clock. C 3 =G 3 +G 2 P 3 +G 1 P 2 P 3 +G 0 P 1 P 2 P 3 C 4 =G 4 +G 3 P 4 +G 2 P 3 P 4 +G 1 P 2 P 3 P 4 +G 0 P 1 P 2 P 3 P 4 etc. 25 26 Carry-Look-Ahead Adder Smaller Fast Adders? Compute all generate G i = a i ∧ b i [1,1] Carry-look-ahead circuit for carry C n-1 propagate P i =a i ⊕ b i [0,1],[1,0] has 2 + 3 +...+ n = (n+2)(n-1)/2 gates Then compute all: – a lot more than ripple-carry adder circuit. C 0 =G 0 C 1 =G 1 +G 0 P 1 C 2 =G 2 +G 1 P 2 +G 0 P 1 P 2 C 3 =G 3 +G 2 P 3 +G 1 P 2 P 3 +G 0 P 1 P 2 P 3 C 4 =G 4 +G 3 P 4 +G 2 P 3 P 4 +G 1 P 2 P 3 P 4 +G 0 P 1 P 2 P 3 P 4 etc. Can do this with roughly 2 log 2 n depth and linear Finally, use these to compute size using ideas from DFAs Sum 1 = P 1 ⊕ C 0 Sum 2 = P 2 ⊕ C 1 Sum 0 = P 0 Sum 3 = P 3 ⊕ C 2 Sum 4 = P 4 ⊕ C 3 Sum 5 = P 5 ⊕ C 4 etc If all C i are computed using 2-level logic, total depth is 6. 27 28
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