2.1 Unit 2 Digital Circuits (Logic)
2.2 Moving from voltages to 1's and 0's… ANALOG VS. DIGITAL
2.3 Signal Types • Analog signal – Continuous time signal where each voltage level has a unique meaning – Most information types are inherently analog • Digital signal – Continuous signal where voltage levels are mapped into 2 ranges meaning 0 or 1 – Possible to convert a single analog signal to a set of digital signals volts volts 1 1 Threshold 0 0 0 time time Analog Digital
2.4 Signals and Meaning Analog Digital 5.0 V 5.0 V Logic 1 2.0 V Illegal Threshold Range 0.8 V Logic 0 0.0 V 0.0 V Each voltage value Each voltage maps to '0' or '1' has unique meaning (There is a small illegal range where meaning is undefined since threshold can vary based on temperature, small variations in manufacturing, etc.)
2.5 Analog vs. Digital USC students used to program analog computers!
2.6 A Brief History COMPUTERS AND SWITCHING TECHNOLOGY
2.7 Transistor Overview • Electronic computers require some kind Gate of "__________" (on/off) technology that +5V Source Drain allows one signal to turn another signal controls the operation Voltage at the gate - - on or off Transistor of the transistor is 'on' – Initially that was the ______________ but - - - - Silicon then replaced by the transistor High voltage at gate allows • Invented by Bell Labs in 1948 current to flow from source to drain • Uses ______________ materials (silicon) • Much smaller, faster, more reliable Gate (doesn't burn out), and dissipated less 0V Transistor Source Drain power than previous technologies (e.g. is 'off' - vacuum tubes). - Silicon Low voltage at gate prevents current from flowing from source to drain Individual Transistors (About the size of your fingertip)
2.8 Moore's Law & Transistors • We continue to shrink the size of the transistor structure • Moore's Law = Number of transistors able to be fabricated on a chip will _______________________ _________________________________ – We are approaching the physical limitations of this shrinking – ______ compound annual growth rate over 50 years • No other technology has grown so fast so long • Transistors are the fundamental building block of computer HW – Switching devices: Can conduct [on = 1] or not-conduct [off = 0] based on an input voltage
2.9 How Does a Transistor Work • Transistor inner workings – http://www.youtube.com/watch?v=IcrBqCFLHIY
2.10 NMOS Transistor Physics • Let's review what we saw in the video… • Transistor is started by implanting two n-type silicon areas, separated by p-type n-type silicon (extra negative charges) - Source Drain Input Input - - - + + + p-type silicon ("extra" positive charges)
2.11 NMOS Transistor Physics • A thin, insulator layer (silicon dioxide or just "oxide") is placed over the silicon between source and drain Source Input Drain Output - - - - + + Insulator Layer + n-type silicon (extra (oxide) negative charges) p-type silicon ("extra" positive charges)
2.12 NMOS Transistor Physics • A thin, insulator layer (silicon dioxide or just "oxide") is placed over the silicon between source and drain • Conductive polysilicon material is layered over the oxide to form the gate input Gate Input Source Input Drain Output conductive - polysilicon - - - + + Insulator Layer + n-type silicon (extra (oxide) negative charges) p-type silicon ("extra" positive charges)
2.13 NMOS Transistor Physics • Positive voltage (charge) at the gate Gate Input input repels the Source Input + Drain Output extra positive + + n-type charges in the p- + + type silicon + + + + • Result is a negative- - - - - - charge channel + + + + p-type between the source negatively-charge positive charge input and drain channel "repelled"
2.14 NMOS Transistor Physics • Electrons can flow through the Gate Input negative channel Source Input + Drain Output from the source + + n-type - input to the drain + - + - output - + + + + - - - - - - - • The transistor is - - - "on" + + + + p-type Negative channel between source and drain = Current flow
2.15 NMOS Transistor Physics • If a low voltage (negative charge) is Gate Input placed on the gate, Source Input - Drain Output no channel will - - n-type - develop and no - - - - current will flow - - - - - - - + + + - • The transistor is + "off" + + p-type No negative channel between source and drain = No current flow
2.16 View of a Transistor • Cross-section of transistors on an IC • Moore's Law is founded on our ability to keep shrinking transistor sizes – Gate/channel width shrinks – Gate oxide shrinks • Transistor feature size is referred to as the implementation "technology node" Electron Microscope View of Transistor Cross-Section
2.17 Minimum Feature Size
2.18 Processor Trends 2 nd Gen. Intel Core i7 Extreme • Processor for desktops launched in Q4 of 2012 • #cores/#threads: 6/12 • Technology node: 32nm wire width • Clock speed: 3.5 GHz • Transistor count: Over one billion 1971 – Intel 4004 • Cache: 15MB 1000 transistors • Addressable memory: 64GB 10,000 nm wire width Max 4K-bits addressable memory 1 MHz operation
2.19 ARM Cortex A15 ARM Cortex A15 in 2011 to 2013 • 4 cores per cluster, two clusters per chip • Technology node: 22nm • Clock speed: 2.5 GHz • Transistor count: Over one billion • Cache: Up to 4MB per cluster • Addressable memory: up to 1TB • Size: 52.5mm by 45.0mm 19
2.20 DIGITAL LOGIC GATES
2.21 Transistors and Logic • Transistors act as B A switches (on or off) S1 S2 • Logic operations (AND / Series Connection S1 AND S2 must be OR) formed by on for A to be connected to B connecting them in specific patterns S1 A B – Series Connection S2 – Parallel Connection Parallel Connection S1 OR S2 must be on for A to be connected to B
2.22 Gates • Each logical operation (AND, OR, NOT) can be implemented as an digital device called a "gate" – The schematic symbols below are used to represent each logic gate • Each logic gate can be built by connecting transistors in various configurations AND Gate OR Gate NOT Gate
2.23 AND Gates • An AND gate outputs a '1' (true) if ALL inputs are '1' (true) • Gates can have several inputs • Behavior can be shown in a truth table (listing all possible input combinations and the corresponding output) X Y Z F 0 0 0 0 0 0 1 0 X Y F 0 1 0 0 0 0 0 X X 0 1 1 0 F Y F 0 1 0 Y Z 1 0 0 0 1 0 0 F=X • Y F=X•Y•Z 1 0 1 0 1 1 1 1 1 0 0 1 1 1 1 2-input AND 3-input AND
2.24 OR Gates • An OR gate outputs a '1' (true) if ANY input is '1' (true) • Gates can also have several inputs X Y Z F 0 0 0 0 0 0 1 1 X Y F 0 1 0 1 X 0 0 0 X F 0 1 1 1 Y F Y 0 1 1 Z 1 0 0 1 1 0 1 F=X+Y 1 0 1 1 F=X+Y+Z 1 1 1 1 1 0 1 1 1 1 1 2-input OR 3-input OR
2.25 Buffer & NOT (Inverter) Gate • A Buffer simply passes a digital value – But strengthens it ___________ (e.g. boosts 3.7V closer to 5V) • A NOT (aka "____________") gate inverts a digital signal to its opposite value (i.e. flips a bit) the "bubble" (logically performs the inversion) X F X F X F 0 0 1 0 X F 1 1 0 1 bar or ' mean F = X F = X or X' inversion
2.26 Aside: How Do You Build an Inverter (1)? • A simple (though maybe not ideal) method to build an inverter is to place a transistor in _________ with a resistor – Input to inverter is input to transistor – Output of inverter is node between resistor and transistor • We can model the transistor as a _____________ • Develop an equation for Vout using the voltage divider eqn. Vdd Vdd Vin Vout R pullup R pullup Vout = __________ Vout Vout Vin R Trans Vin GND GND
2.27 Aside: How Do You Build an Inverter (2)? • First, estimate the resistance of R trans if Vin is 0 (low) then again if Vin is 1 (high-voltage) • Use that estimate in your equation for Vout to determine the output voltage Vdd Vdd R pullup R pullup Vout = ____ Vout = ____ 0 R trans = ____ R trans = ____ 1 (Vdd) GND GND
2.28 NAND and NOR Gates • Inverted versions of the AND and OR gate X X Z Z Y Y NAND NOR = = + Z X Y Z X Y X Y Z X Y Z X Y Z X Y Z 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 1 1 0 1 1 0 1 0 1 0 0 1 0 1 1 0 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 0 AND NAND OR NOR True if NOT ALL True if NOT ANY inputs are true input is true
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