TM Announcement, The Next Generation of POWER7 Power Systems Power - PowerPoint PPT Presentation

IBM Power Systems TM Announcement, The Next Generation of POWER7 Power Systems Power your planet. February 25, 2010

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IBM Power Systems POWER7 System Highlights  Balance System Design - Cache, Memory, and IO  POWER7 Processor Technology - 6 th Implementation of multi-core design - On chip L2 & L3 caches  POWER7 System Architecture - Blades to High End offerings - Enhances memory implementation - PCIe, SAS / SATA  Built in Virtualization - Memory Expansion - VM Control  Green Technologies - Processor Nap & Sleep Mode - Memory Power Down support - Aggressive Power Save / Capping Modes 600 500  Availability 400 - Processor Instruction Retry 300 200 - Alternate Process Recovery 100 - Concurrent Add & Services 0 JS23 JS43 520 550 560 570/16 570/32 595 3 February 25, 2010

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IBM Power Systems Power Processor Technology IBM investment in the Power Franchise Dependable Execution for a decade POWER8 POWER7 45 nm POWER6 Globalization and globally available resources 65 nm • Performance/System Capacity POWER5 • 4-5X increase from Power6 130 nm • Multi Core – Up to 8 POWER4 • SMT4 – 4 threads/core • On-Chip eDRAM 180 nm  Dual Core  High Frequencies • Energy  Dual Core  Virtualization + • Efficiency: 3-4X Power6  Enhanced Scaling  Memory Subsystem + • Dynamic Energy  SMT  Dual Core  Altivec  Distributed Switch + Management  Chip Multi Processing  Instruction Retry • Reliability +  Core Parallelism +  Distributed Switch  Dyn Energy Mgmt  Shared L2  FP Performance + • Memory DIMM – DRAM  SMT +  Dynamic LPARs (32)  Memory bandwidth + Sparing  Protection Keys  Virtualization • N+2 Voltage Regulator Redundancy • Protection Keys + 5 February 25, 2010

IBM Power Systems POWER6 – POWER7 Compare Wireless world  Mobile platforms are developing as new means of identification.  Security technology is many years behind the security used to protect PCs. Supply chain  The chain is only as strong as the weakest link… partners need to shoulder their fair share of the load for compliance and the responsibility for failure. Clients expect privacy  An assumption or expectation now exists to integrate security into the infrastructure, processes and applications to maintain privacy. Compliance fatigue  Organizations are trying to maintain a balance between investing in both the security and compliance postures. 6 February 25, 2010

IBM Power Systems POWER7 Processor Chip C ores : 8 ( 4 / 6 core options ) Local SMP Links 567mm 2 Technology:  45nm lithography, Cu, SOI, eDRAM POWER7 POWER7 POWER7 POWER7 F Transistors: 1.2 B CORE CORE CORE CORE A  Equivalent function of 2.7B S T  eDRAM efficiency L2 Cache L2 Cache L2 Cache L2 Cache Eight processor cores L3 REGION  12 execution units per core MC0 MC1 L3 Cache and  4 Way SMT per core – up to 4 threads per core Chip Interconnect  32 Threads per chip  L1: 32 KB I Cache / 32 KB D Cache L2 Cache L2 Cache L2 Cache L2 Cache  L2: 256 KB per core  L3: Shared 32MB on chip eDRAM POWER7 POWER7 POWER7 POWER7 CORE CORE CORE CORE Dual DDR3 Memory Controllers  100 GB/s Memory bandwidth per chip Remote SMP & I/O Links Scalability up to 32 Sockets  360 GB/s SMP bandwidth/chip  20,000 coherent operations in flight Binary Compatibility with POWER6 7 February 25, 2010

IBM Power Systems Memory Channel Bandwidth Evolution POWER7 POWER6 POWER5 Memory Performance: Memory Performance: Memory Performance: 2x DIMM 4x DIMM 6x DIMM D D D D D D D D D D D D D D D D D D D D R R R R R R R R R R 3 3 3 3 3 3 3 3 3 3 DDR3 @ 1066 MHz DDR2 @ 553 MHz DDR2 @ 553 / 667 MHz Effective Bandwidth: Effective Bandwidth: Effective Bandwidth: 1.1 GB/s 2.6 GB/sec 6.4 GB/sec 8 February 25, 2010

IBM Power Systems Multi-threading Evolution Single thread Out of Order S80 HW Multi-thread FX0 FX0 FX1 FX1 FP0 FP0 FP1 FP1 LS0 LS0 LS1 LS1 BRX BRX CRL CRL POWER5 2 Way SMT POWER7 4 Way SMT FX0 FX0 FX1 FX1 FP0 FP0 FP1 FP1 LS0 LS0 LS1 LS1 BRX BRX CRL CRL No Thread Executing Thread 0 Executing Thread 1 Executing Thread 2 Executing Thread 3 Executing 9 February 25, 2010

IBM Power Systems POWER7 TurboCore Mode Power 780 TurboCore Chip  TurboCore Chips: 4 available cores Core Core Core Core  Aggregation of L3 Caches of unused cores. P  TurboCore chips have a 2X the L3 Cache O W L2 L2 L2 L2 per Chip available E S R M - 4 TurboCore Chips L3 = 32 MB P  Performance gain over POWER6. 32 MB G F - Provides up to 1.5X per core to core X L3 Cache A B  Chips run at higher frequency: R - Power reduction of unused cores. I C  With “Reboot”, System can be reconfigured B L2 L2 L2 L2 U to 8 core mode. S - ASM Menus Core Core Core Core Unused Memory Interface TurboCores Core February 25, 2010 1 0

IBM Power Systems Active Memory Expansion Effectively up to 100% more True True True Expanded Expanded Expanded memory memory memory memory memory memory memory True True True Expanded Expanded Expanded memory memory memory memory memory memory POWER7 advantage Expand memory beyond physical limits More effective server consolidation  Run more application workload / users per partition  Run more partitions and more workload per server 11 February 25, 2010

IBM Power Systems Active Memory Expansion Innovative POWER7 technology  For AIX 6.1 or later  For POWER7 servers Uses compression/decompression to effectively expand the true physical memory available for client workloads Often a small amount of processor resource provides a significant increase in the effective memory maximum  Processor resource part of AIX partition’s resource and licensing Actual expansion results dependent upon how “compressible” the data being used in the application  A SAP ERP sample workload shows up to 100% expansion,  Your results will vary  Estimator tool and free trial available 12 February 25, 2010

IBM Power Systems Active Memory Expansion & Active Memory Sharing Active Memory Expansion Active Memory Sharing Effectively gives more memory capacity to Moves memory from one partition to the partition using compression / another decompression of the contents in true Best fit when one partition is not busy memory when another partition is busy AIX partitions only AIX, IBM i, and Linux partitions 15 #10 #9 #8 10 #7 #6 #5 5 #4 #3 #2 0 #1 Active Memory Expansion Active Memory Sharing Supported, potentially a very nice option Considerations  Only AIX partitions using Active Memory Expansion  Active Memory Expansion value is dependent upon compressibility of data and available CPU resource (Source: CSI 2007 Survey, n= 494, US) 13 February 25, 2010

IBM Power Systems TPMD: Thermal Power Management Device  TPMD card is part of the base hardware configuration.  Residing on the processor planar  TPMD function is comprised of a risk processor and data acquisition  TPMD monitor power usage and temperatures in real time  Responsible for thermal protection of the processor cards  Can adjust the processor power and performance in real time.  If the temperature exceeds an upper (functional) threshold, TPMD actively reduces power consumption by reducing processor voltage and frequency or throttling memory as needed.  If the temperature is lower than upper (functional) threshold, TPMD will allows POWER7 cores to “Over clock” if workloads demands are present. 14 February 25, 2010

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IBM Power Systems Power Systems – February 2010 Power 780  New POWER7 in middle of the line  Power 750 Express Power 770  Power 755 for HPC  Power 770 modular  Power 780 modular high-end  POWER6 continues  Power 520, Blades Power 750  Power 550  Power 560  Power 570 Power 560  Power 575  Power 595 Power 755 JS Blades IBM Systems Software 16 February 25, 2010

IBM Power Systems Processor Offerings for Rack / HPC POWER7 Processor Offerings 4 6 8 Cores / Socket Power 750 - Yes Yes (3) Power 755 - - Yes Configuration Options Sockets 1 2 3 4 6 Core Chips 6 Cores 12 Cores 18 Cores 24 Cores 8 Core Chips 8 Cores 16 Cores 24 Cores 32 Cores 1-4 Socket System 17 February 25, 2010

IBM Power Systems Processor Offerings for Modular Systems POWER7 TurboCore / CoD Processor Offerings Cores / Socket 4 TurboCore 6 8 Base 8 Enhanced Power 770 - Yes Yes - Power 780 Yes - - Yes Configuration Options Enclosures 1 2 3 4 4 Core Chips 8 Cores 16 Cores 24 Cores 32 Cores 6 Core Chips 12 Cores 24 Cores 36 Cores 48 Cores 8 Core Chips 16 Cores 32 Cores 48 Cores 64 Cores 18 February 25, 2010

IBM Power Systems POWER7 Model 750 8233-E8B 19 February 25, 2010