syed aftab ab rashi hid geoffrey nelissen eduardo tovar
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Syed Aftab ab Rashi hid, Geoffrey Nelissen,Eduardo Tovar Task A - PowerPoint PPT Presentation

Syed Aftab ab Rashi hid, Geoffrey Nelissen,Eduardo Tovar Task A fct_A { Main memory int i = 0; while(i < 10) { call fct_B( x ); Cache ++i; } L2 } 1 Data cache Instr. cache 2 L1 L1 3 4 5 6 Processor 7 8 Task A fct_A


  1. Syed Aftab ab Rashi hid, Geoffrey Nelissen,Eduardo Tovar

  2. Task A fct_A { Main memory int i = 0; while(i < 10) { call fct_B( x ); Cache ++i; } L2 } 1 Data cache Instr. cache 2 L1 L1 3 4 5 6 Processor 7 8

  3. Task A fct_A { Main memory Slow int i = 0; while(i < 10) { call fct_B( x ); Cache ++i; } L2 } 1 Data cache Instr. cache 2 L1 L1 3 4 5 6 Processor 7 8

  4. Task A fct_A { Main memory int i = 0; while(i < 10) { call fct_B( x ); Cache ++i; } L2 } 1 Int i=0 Data cache Instr. cache Fast 2 If i < 10 L1 L1 3 fct_B 4 fct_B 5 fct_B 6 fct_B Processor 7 ++i 8 goto 2

  5. Main memory Cache L2 The utilisat lisation on of caches ches reduces uces the worst st-case ase execution ecution time me (WCET) ET) of a task sk Data cache Instr. cache in isol olation ation L1 L1 Processor

  6. • Intra-Task Cache Interference • Inter-Task Cache Interference

  7. • Intra-task Cache Interference Task A Cache 1 fct_A { 2 int i = 0; 3 while(i < 10) { 4 call fct_B( x ); 5 ++i; } 6 } 7 fct_C 8 { 9 int j = 0; while(j < 10) 10 { 11 call fct_D( y ); ++j; 12 } 13 } 14 15 16

  8. • Intra-task Cache Interference Task A Cache 1 Int i=0 fct_A { 2 If i < 10 int i = 0; 3 fct_B while(i < 10) { 4 fct_B call fct_B( x ); 5 fct_B ++i; } 6 fct_B } 7 ++i fct_C 8 goto 2 { 9 int j = 0; while(j < 10) 10 { 11 call fct_D( y ); ++j; 12 } 13 } 14 15 16

  9. • Intra-task Cache Interference Task A Cache 1 Int i=0 fct_A { 2 If i < 10 int i = 0; 3 fct_B while(i < 10) { 4 fct_B call fct_B( x ); 5 fct_B ++i; } 6 fct_B } 7 ++i fct_C 8 goto 2 { 9 Int j=0 int j = 0; while(j < 10) 10 If j < 10 { 11 fct_D call fct_D( y ); ++j; 12 fct_D } 13 fct_D } 14 fct_D 15 ++j 16 goto 10

  10. • Intra-task Cache Interference Task A Cache 1 Int i=0 fct_A { 2 If i < 10 int i = 0; 3 fct_B while(i < 10) { 4 fct_B call fct_B( x ); 5 fct_B ++i; } 6 fct_B } 7 ++i fct_C 8 goto 2 { 9 Int j=0 int j = 0; while(j < 10) 10 If j < 10 { 11 fct_D call fct_D( y ); ++j; 12 fct_D } }

  11. • Intra-task Cache Interference Task A Cache 1 Int i=0 / fct_D fct_A { 2 If i < 10 / fct_D int i = 0; 3 fct_B / ++j while(i < 10) { 4 fct_B / goto 10 call fct_B( x ); 5 fct_B ++i; } 6 fct_B } 7 ++i fct_C 8 goto 2 { 9 Int j=0 int j = 0; while(j < 10) 10 If j < 10 { 11 fct_D call fct_D( y ); ++j; 12 fct_D } }

  12. • Intra-task Cache Interference Task A Cache Intra-ta task sk cach che e interference erence occurs if the memor ory footpri tprint nt of a task is 1 Int i=0 / fct_D fct_A { 2 If i < 10 / fct_D larg rger than the allocat cated ed cache int i = 0; 3 fct_B / ++j while(i < 10) space or when two memory entries es { 4 fct_B / goto 10 of that task are mapped ed to the same call fct_B( x ); 5 fct_B ++i; space in cache. } 6 fct_B } 7 ++i fct_C 8 goto 2 { Increa ease se in intra-task ask cache he 9 Int j=0 int j = 0; while(j < 10) interference erence may also result in 10 If j < 10 { 11 fct_D increas asing ng the WCET of tasks. call fct_D( y ); ++j; 12 fct_D } }

  13. • Inter-task Cache Interference

  14. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD) – Cache Persistence Reload Overhead (CPRO)

  15. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD)

  16. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD) Task B 8 7 Cache set 6 5 4 3 2 1

  17. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD) Task A Task B 8 7 Cache set 6 5 4 3 2 1

  18. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD) Task A Task B 8 7 Cache set 6 5 4 3 2 1

  19. • Inter-task Cache Interference – Cache Related Preemption Delays (CRPD) Task A Task B 8 7 Cache set 6 5 4 3 2 1 Cache Related Preemption Delay (CRPD)

  20. • Inter-task Cache Interference – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1

  21. • Inter-task Cache Interference – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1

  22. • Inter-task Cache Interference – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1 Shorter response time

  23. • Inter-task Cache Interference – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1

  24. • Inter-task Cache Interference – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1 Cache Persistence Reload Overhead (CPRO)

  25. • Inter-task Cache Interference – Cache Related Preemption Delay (CRPD) – Cache Persistence Reload Overhead (CPRO) Task A Task B 8 7 Cache set 6 5 4 3 2 1 Cache Related Cache Persistence Reload Overhead Preemption Delay (CRPD) (CPRO) Both CRPD D and CPRO O may result in increa easi sing ng the WCET/W T/WCRT of tasks.

  26. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS.

  27. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1

  28. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Sequential Cache Allocation

  29. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Sequential Cache Allocation

  30. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Sequential Cache Allocation

  31. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 Higher Inter- task cache τ 2 interference τ 3 Sequential Cache Allocation

  32. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- task cache τ 2 τ 2 interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning

  33. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- task cache τ 2 τ 2 interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning

  34. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- Higher Intra- task cache task cache τ 2 τ 2 interference interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning

  35. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- Higher Intra- task cache task cache τ 2 τ 2 interference interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  36. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- Higher Intra- task cache task cache τ 2 τ 2 interference interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  37. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- Higher Intra- task cache task cache τ 2 τ 2 interference interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  38. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 0 CS CS τ 1 τ 1 Higher Inter- Higher Intra- task cache task cache τ 2 τ 2 interference interference τ 3 τ 3 Sequential Cache Allocation Full Cache Partitioning 0 CS τ 1 Cache Eviction caused by τ 1 τ 2 are inevitable !!! τ 3 Optimized Cache Allocation

  39. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  40. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  41. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation

  42. • Example: Task set Ƭ= { τ 1, τ 2, τ 3 } and a cache of total size CS. CS/2 CS/2 CS τ 2 τ 3 τ 1 0 CS τ 1 τ 2 τ 3 Optimized Cache Allocation Task set sched edulabi ulabilit ity may imp mprove e if the reduc ducti tion on in the inter er- task k cache he inter erferen erence ce between τ 1 and τ 2 dominat minate the incre rease se in the e intra ra-task task cache he inter erferenc rence of τ 1 and τ 2

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