Replacement Transmitter System for USCG Loran Recapitalization - PowerPoint PPT Presentation

Replacement Transmitter System for USCG Loran Recapitalization Erik Johannessen Megapulse, Inc Andrei Grebnev Megapulse, Inc Terry Yetsko BCO, Inc Presented at ILA30 – St. Germain-en-Laye

Requirements and Understanding • USCG issues Performance Specification – Meet and exceed COMDTINST M16562 • Controlling factors • Remote operability • Future requirements • Reduced operational cost • Megapulse understands this to mean – TTX not supportable in the near term (NSITNT) – SSX control circuits NSITLT – TTX/SSX don’t support additional capabilities – Less bodies = Less $

General Design Strategy • Goal: – The Megapulse technical response shall describe a replacement transmitter based on the following design goals: • Further increase individual HCG output power through improved components • Modernize Control Console assembly • Make the number of DHC’s variable and assignments flexible • Future incorporation of IFM should have minimal impact on proposed architecture • Maximize commonality with exiting USCG assemblies

General Design Block Diagram Simplified AN/FPN-64 Coupling Output Network Network Remote Comm New Upgraded SSX A6500 A6500 AN/FPN-64 Control Switch Switch HCG's Assy. USCG Timer Power Power Dist RF Feedback REPLACEMENT SSX MP3611-A.VSD

Modernizations AN/FPN-64, A6500 • Increased Output Power/Higher Efficiency – Demonstrated in A6500 – Modern components available with higher ratings open possibility further

Modernization AN/FPN-64, A6500 • Increasing Flexibility of DHCs – Original SSX prototype used 10 DHCs – Timing & amplitude was controlled by a PDP-11 • Idea was Revisited During “Dual Pulse” Tests – A 52 µsec time to peak Chayka pulse was generated using 4 DHCs – A 65µsec TTP Loran pulse was generated with 6 DHCs – Results published at Bonn DGON conf. Mar 2000 • DHCs that are Flexible and Reassigneable – ECD control will be more robust – Enhanced fail soft of HCG’s – Allows for control of TTP

Design Verification Simulations &Tests • Tests and Simulations were Performed to Verify Proposed Modernizations – Identify impact of increased voltages and currents (due to doubling the output power) on HCG components; – Ensure that Loran signal parameters (e.g. ECD, Tail Attenuation, etc) can be met with reduced number of HCG’s.

MP3600-1.VSD R A • Schematic of Experimental Test Setup C A Antenna L A L C Coupling Network C C High Power Test Two HCG's Parallel in

Experimental Test Setup

Experimental Test Setup (cont.)

Design Verification Simulation & Tests • HCG Current into Coupling Network

Design Verification Simulation & Tests • Implications to Design of HCG (identified by shaded areas below) POWER SUPPLY MODULE MEGATRON CHARGER MODULE MEGATRON MODULE Reset and Clamp Power Supplies R18 CR5 Q3 Q2 C0 C1 C2 115 V 60HZ T1 T Q1 L1 L3 T5 Q4 Q1 CR1 L1 Control from TCS HCG CONTROL LOGIC Status & MP3612-1.VSD Alarms

Design Verification Simulation & Tests • IsSpice4 Software was used for Simulations • 16 HCG Transmitter with 625ft TLM Antenna was Modeled • Actual Cape Race Transmitter (32 HCG) Test Data was used as Reference to Validate Simulation Results • Simulations Included: – Generations of Loran signals with full range of ECD’s; – Verification of signal’s tail attenuation (0.014A @ t>500sec); – Signal’s spectrum compliance to specification

Design Verification Simulation & Tests • Simulation Schematic (16 HCG-625ft TLM) 2 Half Cycle Generator Coupling Tailbiter Antenna R1 V1 1k Network B1 Y3 Y1 R3 Y4 volts amps Voltage 40k volts 1 11 9 L3 C3 3 L2 255u 0.01uF R2 7.45uH V2 1k 10 8 R8 C2 2.5 0.34uF C1 L1 1.47uF 1.72uH 12 4 R7 R4 5 V3 1k 7 14 X2 SWITCH V6 5 R5 V4 1k B2 Voltage 13 6 R9 1k R6 V5 Y2 1k amps - V1 – 100kHz Sinewave Generator - V2 – V5 – Generate 5µsec wide pulses at 5µsec intervals - B1 – DHC Generator = V1*V2+V1*V3+V1*V4+V1*V5; - B2 – Loran-C Signal Generator (per COMDTINST M16562.4A specification)

Design Verification Simulation & Tests • Simulation Generated Loran Signal 0.8 0.4 Normalized Antenna 0 Current -0.4 -0.8 50 150 250 350 450 Time in usec

Design Verification Simulation & Tests • Generated Loran signal spectrum 0 -10 -20 Attenuation (dB) -30 Signal Spectrum -40 -50 -60 -70 50000 60000 70000 80000 90000 100000 110000 120000 130000 140000 150000 Frequency (Hz)

Design Verification Simulation & Tests 0.8 ECD = +5µsec 2 – 2 – 6 – 6 0.4 Normalized Antenna Current (2.2 – 2.1 – 6.1 – 6) 0 (E SCR ) MAX = 1650 v -0.4 (E C1 ) MAX = 1100 v (I A ) MAX = 665A -0.8 5 15 25 35 45 TIME in µsecs

Design Verification Simulation & Tests 0.8 Normalized Antenna Current ECD = +2.5µsec 0.4 4 – 4 – 4 – 4 (4.2 – 4.1 – 4.03 – 4.03) 0 (E SCR ) MAX = 1600 v -0.4 (E C1 ) MAX = 1100 v (I A ) MAX = 665A -0.8 5 15 25 35 45 TIME in µsecs

Design Verification Simulation & Tests • Simulation Results – Full range of Loran signal ECD’s was generated. ECD “truth” table can be used as a reference in the design of Transmitter Control Assembly (TCA) – The same model will be used to generate HCG reassignment table for TCA, which will be used in case of HCG failure (soft fail concept) – Different values of Tailbiter components were analyzed with respect to tail attenuation requirements

TCS Design Philosophy • Retain Existing System Partitioning – GFE Loran Timer and Remote Control – Control Console, XMTR and Power Distribution • Retain Existing Functionality – Replace TOPCO, PATCO, SDA and Display Units – Auto “Fail-Over”/Redundancy • Incorporate New Functionality – Support for Additional Drive Half Cycles – Dynamic Re-Assignment of HCGs – Real-Time Loran Signal Quality Analysis (SQA) – Interpulse Modulation (Supernumerary) • Allow for Future Capabilities – Intrapulse Frequency Modulation (IFM)

Functional Decomposition - Summary TCS Functional Decomposition User / Maintainer / Loran Timer/HCG General XMTR Embedded LORDAC Remote Interface Signal Processor Commands/Status/Faults Functionality Antenna Tuning Operator/Maintainer Loran Timer Signal RF Switch Control Screens Conditioning /Monitoring Support Timing Signal Generation Antenna Tuning Control ECD Calculation Display/Keyboard/Mouse /Status MTS Serial Stream Loran SQA Alarm Panel Control Generation HCG Fault Monitoring Event/Data Logging DHC Feedback Processing Tailbiter Fault Monitoring Remote Control and Data Tailbiter Trigger Generation Output Network Fault Logging (RS-232) Monitoring A/B Rate Failsafe Blanking Redundancy Management Coupling Network Fault Tailbiter Monitor UPS Monitoring Monitoring Synchronization PPD Commands/Status

TCS Design Approach • Redundant Design • Commercial Off-The-Shelf (COTS) to Reduce Schedule/Technical Risk • Card Based CPU for Reliability/Maintainability • Hardware Independent C/C++ Software • Graphics Display, Keyboard and Pointing Device Support • Rear Panel Signal I/O with MS Style Connectors • 19” Rack Mounting with Forced Air Cooling

TCS Block Diagram TCC (Transmitter Prime Control Console) #1 Alarm Graphics Keyboard/ Power Panel Display Mouse Status Graphics Control TCC Power P o w Power e r Distribution Distribution S t a t w/UPS u s Control Timing C o n t r o l Transmitter Control Control Assembly Remote (TCA) Control/ Control/Status Status Monitoring Timing Timing Timing Part of AN/FPN-65 Control Solid State Control Control Loran-C Connector Transmitter Phase Connector Timer Assembly (SSX) Timing Heartbeat Status Data Heartbeat Assembly Remote Timing Control/Status Control/ Transmitter Monitoring Control Control Assembly (TCA) l o Status r t n o C Control TCC Power r e w o P Distribution s u t a w/UPS t S Status Graphics Control Alarm Graphics Keyboard/ Panel Display Mouse TCC (Transmitter Control Console) #2

Transmitter Control Subsystem TCC (Transmitter TCC (Transmitter Redundant Transmitter Control Console) #1 Control Console) #2 Control Consoles Alarm/Status Panel Connector Panel Power Control 2U 2U Assembly 1U 1U Touchscreen Display Retractable Keyboard Tray 10U 10U 4U 4U BLANK BLANK TCA (Transmitter Control Assembly) AC Input Power 9U 9U 1U 1U BLANK 1U BLANK 1U Phase Switcher 5U 5U Fan UPS Assembly

TCA Block Diagram Alarm Display Keyboard/ Panel Monitor Mouse Status Graphics Control Serial Parallel Remote Printer Interface (Opt.) Slot-1 (VMEbus) or System Slot (cPCI) Serial Processor Module Backup UPS Heartbeats TCA CompactPCI or VMEbus Backplane HCG Digital Signal Quality LORDAC Sync Sync Controller Controller Input/Output Analyzer (SQA) Module Module Module(s) Module Signal Conditioning Signal Conditioning Signal Conditioning Antenna Loran DHC MTS Tailbiter Commands Status/Faults Feedback Timer Feedback Triggers - RF Switch - RF Switch - Ant Tune - HCG - PPD - Output Net - Coupling Net - TB Mon