pslp padded slp automatic vectorization
play

PSLP: Padded SLP Automatic Vectorization Vasileios Porpodas , - PowerPoint PPT Presentation

Jul 04, 2023 •369 likes •1.29k views

PSLP: Padded SLP Automatic Vectorization Vasileios Porpodas , Alberto Magni and Timothy M. Jones University of Cambridge University of Edinburgh EuroLLVM APR 2015 slide 1 of 17 www.cl.cam.ac.uk/ vp331/ Why SIMD

  1. PSLP: Padded SLP Automatic Vectorization Vasileios Porpodas † , Alberto Magni ‡ and Timothy M. Jones † University of Cambridge † University of Edinburgh ‡ EuroLLVM APR 2015 slide 1 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  2. Why SIMD Vectorization? Scalar Reg. File • Scalable parallelism FU FU FU FU Scalar Func. Units a. ILP slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  3. Why SIMD Vectorization? Scalar Reg. File • Scalable parallelism FU FU FU FU Scalar Func. Units a. ILP slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  4. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism FU FU FU FU 0 1 2 3 Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  5. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism FU FU FU FU 0 1 2 3 Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  6. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism • High Performance FU FU FU FU 0 1 2 3 Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  7. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism • High Performance FU FU FU FU 0 1 2 3 • Energy efficiency Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  8. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism • High Performance FU FU FU FU 0 1 2 3 • Energy efficiency Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism • Supported since mid 90’s • Frequent updates of vector ISAs AVX2 SSE4 slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  9. Why SIMD Vectorization? Scalar Reg. File Vector Reg. File • Scalable parallelism • High Performance FU FU FU FU 0 1 2 3 • Energy efficiency Scalar Func. Units Vector Unit a. ILP b. Vector Parallelism • Supported since mid 90’s • Frequent updates of vector ISAs AVX2 • Vector generation not done in hardware • Low-level programming or SSE4 capable compiler slide 2 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  10. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  11. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] • State-of-the-art straight-line code vectorizer slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  12. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] • State-of-the-art straight-line code vectorizer • Implemented in most compilers (including GCC and LLVM) slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  13. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] • State-of-the-art straight-line code vectorizer • Implemented in most compilers (including GCC and LLVM) • In theory it should be a superset of loop-vectorizer slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  14. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] • State-of-the-art straight-line code vectorizer • Implemented in most compilers (including GCC and LLVM) • In theory it should be a superset of loop-vectorizer • Unroll loop and vectorize with SLP • Even if loop-vectorizer fails, SLP could partly succeed slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  15. SLP Straight-Line Code Vectorizer • Superword Level Parallelism [Larsen PLDI’00] • State-of-the-art straight-line code vectorizer • Implemented in most compilers (including GCC and LLVM) • In theory it should be a superset of loop-vectorizer • Unroll loop and vectorize with SLP • Even if loop-vectorizer fails, SLP could partly succeed • In practice it is missing features present in the Loop vectorizer (Interleaved Loads, Predication) slide 3 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  16. SLP Vectorization Algorithm Scalar Code • Input is scalar IR slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  17. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores 2 Reductions slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  18. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores Generate graph of 2. isomorphic scalar groups 2 Reductions • Graph contains vectorizable isomorphic instructions slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  19. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores Generate graph of 2. isomorphic scalar groups 2 Reductions • Graph contains vectorizable Calculate Calculate 3. Scalar Cost Vector Cost isomorphic instructions • Cost: weighted instr. count slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  20. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores Generate graph of 2. isomorphic scalar groups 2 Reductions • Graph contains vectorizable Calculate Calculate 3. Scalar Cost Vector Cost isomorphic instructions • Cost: weighted instr. count If 4. Vector Cost < • Check vectorization profitability Scalar Cost slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  21. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores Generate graph of 2. isomorphic scalar groups 2 Reductions • Graph contains vectorizable Calculate Calculate 3. Scalar Cost Vector Cost isomorphic instructions • Cost: weighted instr. count If 4. Vector Cost < • Check vectorization profitability Scalar Cost YES • Emit vectors only if profitable Vectorize groups 5. & emit vectors DONE slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  22. SLP Vectorization Algorithm Scalar Code • Input is scalar IR Find vectorization 1. seed instructions • Seed instructions are: 1 Consecutive Stores Generate graph of 2. isomorphic scalar groups 2 Reductions • Graph contains vectorizable Calculate Calculate 3. Scalar Cost Vector Cost isomorphic instructions • Cost: weighted instr. count If 4. Vector Cost NO < • Check vectorization profitability Scalar Cost YES • Emit vectors only if profitable Vectorize groups 5. & emit vectors DONE slide 4 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  23. When SLP Fails ADD1 ADD2 ADD3 1 Data Dependencies ADD4 slide 5 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  24. When SLP Fails ADD1 ADD2 ADD3 1 Data Dependencies ADD4 Original Vectorized ADD1 Insert1 2 Too many ADD2 Insert2 ADD3 Insert3 gather/scatter ADD4 Insert4 ADD1 ADD2 ADD3 ADD4 instructions. Costs Extract1 outweigh benefits. Extract2 Extract3 Extract4 slide 5 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  25. When SLP Fails ADD1 ADD2 ADD3 1 Data Dependencies ADD4 Original Vectorized ADD1 Insert1 2 Too many ADD2 Insert2 ADD3 Insert3 gather/scatter ADD4 Insert4 ADD1 ADD2 ADD3 ADD4 instructions. Costs Extract1 outweigh benefits. Extract2 Extract3 Extract4 3 Non-isomorphism ADD1 ADD2 MUL ADD4 slide 5 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  26. SLP Fails due to non-isomorphism ... B[i] = A[i] * 7.0 + 1.0; B[i+1]= A[i+1] + 5.0; ... a. Input C code X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  27. SLP Fails due to non-isomorphism ... B[i] = A[i] * 7.0 + 1.0; B[i+1]= A[i+1] + 5.0; ... a. Input C code L 7. L * 1. 5. + + S S b. DFG X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  28. SLP Fails due to non-isomorphism ... B[i] = A[i] * 7.0 + 1.0; B[i+1]= A[i+1] + 5.0; ... a. Input C code L 7. L * 1. 5. + + 0 S S S S S S b. DFG c. SLP internal graph d. SLP vectorized groups X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  29. SLP Fails due to non-isomorphism ... B[i] = A[i] * 7.0 + 1.0; B[i+1]= A[i+1] + 5.0; ... a. Input C code L 7. L * 1. 5. + + + + 1 + + 0 S S S S S S b. DFG c. SLP internal graph d. SLP vectorized groups X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  30. SLP Fails due to non-isomorphism ... B[i] = A[i] * 7.0 + 1.0; B[i+1]= A[i+1] + 5.0; ... a. Input C code NON−ISOMORPHIC L 7. STOP ! L 7. L 2 * 1. L 5. L * * 1. 5. + + + + 1 + + 0 S S S S S S b. DFG c. SLP internal graph d. SLP vectorized groups X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

  31. SLP Fails due to non-isomorphism Scalar Cost L ... B[i] = A[i] * 7.0 + 1.0; L * 7 B[i+1]= A[i+1] + 5.0; + + ... a. Input C code S S NON−ISOMORPHIC L 7. STOP ! L 7. L 2 * 1. L 5. L * * 1. 5. + + + + 1 + + 0 S S S S S S b. DFG c. SLP internal graph d. SLP vectorized groups X Instruction Node or Constant Data Flow Edge slide 6 of 17 www.cl.cam.ac.uk/ ∼ vp331/

Recommend

TSLP Throttling Automatic Vectorization: When Less is More Vasileios Porpodas and Timothy M.

TSLP Throttling Automatic Vectorization: When Less is More Vasileios Porpodas and Timothy M.

TSLP Throttling Automatic Vectorization: When Less is More Vasileios Porpodas and Timothy M. Jones University of Cambridge LLVM Developers Meeting 2015 www.cl.cam.ac.uk/ vp331/ slide 1 of 16 Why SIMD Vectorization? Scalar Reg. File

1.55k views • 112 slides
Using Machine Learning to Improve Automatic Vectorization Kevin Stock Louis-Nol Pouchet P .

Using Machine Learning to Improve Automatic Vectorization Kevin Stock Louis-Nol Pouchet P .

Using Machine Learning to Improve Automatic Vectorization Kevin Stock Louis-Nol Pouchet P . Sadayappan The Ohio State University January 24, 2012 HiPEAC Conference Paris, France Introduction: HiPEAC12 Vectorization Observations

346 views • 22 slides
Is vectorization easy? Is vectorization enough? Sbastien Ponce Florian Lemaitre Plan

Is vectorization easy? Is vectorization enough? Sbastien Ponce Florian Lemaitre Plan

Is vectorization easy? Is vectorization enough? Sbastien Ponce Florian Lemaitre Plan Introduction Matrix-Vector product Batch processing Hand-made Vectorization Check vectorization Conclusion &amp; Guidelines Plan Introduction 1 What

601 views • 42 slides
Automatic SIMD vectorization for Haskell Leaf Petersen, Dominic Orchard , Neal Glew ICFP 2013 -

Automatic SIMD vectorization for Haskell Leaf Petersen, Dominic Orchard , Neal Glew ICFP 2013 -

Automatic SIMD vectorization for Haskell Leaf Petersen, Dominic Orchard , Neal Glew ICFP 2013 - Boston, MA, USA Work done at Intel Labs SIMD Trend towards parallel architectures (multi-core &amp; instruction-level parallelism) SIMD:

559 views • 29 slides
AUTOMATIC VECTORIZATION OF TREE TRAVERSALS Youngjoon Jo, Michael Goldfarb and Milind Kulkarni

AUTOMATIC VECTORIZATION OF TREE TRAVERSALS Youngjoon Jo, Michael Goldfarb and Milind Kulkarni

AUTOMATIC VECTORIZATION OF TREE TRAVERSALS Youngjoon Jo, Michael Goldfarb and Milind Kulkarni PACT, Edinburgh, U.K. September 11 th , 2013 2 Youngjoon Jo Commodity processors and SIMD Commodity processors support SIMD (Single Instruction

1.38k views • 112 slides
Exploiting automatic vectorization to employ SPMD on SIMD registers Stefan Sprenger

Exploiting automatic vectorization to employ SPMD on SIMD registers Stefan Sprenger

Exploiting automatic vectorization to employ SPMD on SIMD registers Stefan Sprenger (sprengsz@informatik.hu-berlin.de) Steffen Zeuch (steffen.zeuch@dfki.de) Ulf Leser (leser@informatik.hu-berlin.de) HardBD &amp; Active 18 April 16, 2018

407 views • 21 slides
Lecture 3 SIMD and Vectorization GPU Architecture Todays lecture Vectorization and SSE

Lecture 3 SIMD and Vectorization GPU Architecture Todays lecture Vectorization and SSE

Lecture 3 SIMD and Vectorization GPU Architecture Todays lecture Vectorization and SSE Computing with Graphical Processing Units (GPUs) Scott B. Baden / CSE 262 / UCSD, Wi '15 2 Performance programming for Mtx Multiply

700 views • 41 slides
LLVM Auto-Vectorization Past Present Future Renato Golin www.linaro.org LLVM

LLVM Auto-Vectorization Past Present Future Renato Golin www.linaro.org LLVM

LLVM Auto-Vectorization Past Present Future Renato Golin www.linaro.org LLVM Auto-Vectorization Plan: What is auto-vectorization? Short-history of the LLVM vectorizer What do we support today, and an overview of how it works

386 views • 22 slides
Outerjoin = with tuples padded with R S R . / S dangling . / n ulls and

Outerjoin = with tuples padded with R S R . / S dangling . / n ulls and

Outerjoin = with tuples padded with R S R . / S dangling . / n ulls and included in the result. A tuple is dangling if it do esn't join with an y other tuple. = R A B 1 2 3 4 = S B C 2 5 2

185 views • 18 slides
Basic SQL types String Char(n): fixed length. Padded Varchar(n): variable length

Basic SQL types String Char(n): fixed length. Padded Varchar(n): variable length

Basic SQL types String Char(n): fixed length. Padded Varchar(n): variable length Number Integer: 32 bit Decimal(5,2): 999.99 Real, Double: 32 bit, 64 bit Datetime Date: 2002-01-15 Time:

733 views • 3 slides
Outline Introduction Contribution: Novel Vectorization and Mapping Workflow.

Outline Introduction Contribution: Novel Vectorization and Mapping Workflow.

11/4/14 Vectorization and Mapping of Software Defined Radio Applications on GPU Platforms Shuvra S. Bhattacharyya Professor, ECE and UMIACS University of Maryland at College Park ssb@umd.edu , http://www.ece.umd.edu/~ssb With

632 views • 19 slides
Function Call Re-Vectorization Pupil: Rubens Emilio Alves Moreira Advisor: Fernando Magno Quinto

Function Call Re-Vectorization Pupil: Rubens Emilio Alves Moreira Advisor: Fernando Magno Quinto

Function Call Re-Vectorization Pupil: Rubens Emilio Alves Moreira Advisor: Fernando Magno Quinto Pereira Function Call Re-Vectorization Programmability Efficiency Function Call Re-Vectorization CUDA: kernel &lt;&lt;&lt;#warps,

1.62k views • 118 slides
ADVANCED DATABASE SYSTEMS Vectorization vs. Compilation @ Andy_Pavlo // 15- 721 // Spring

ADVANCED DATABASE SYSTEMS Vectorization vs. Compilation @ Andy_Pavlo // 15- 721 // Spring

Lect ure # 21 ADVANCED DATABASE SYSTEMS Vectorization vs. Compilation @ Andy_Pavlo // 15- 721 // Spring 2019 CMU 15-721 (Spring 2019) 2 O BSERVATIO N Vectorization can speed up query performance. Compilation can speed up query

605 views • 36 slides
Automatic Enrollment and Automatic IRAs David C. John The Heritage Foundation The Retirement

Automatic Enrollment and Automatic IRAs David C. John The Heritage Foundation The Retirement

Automatic Enrollment and Automatic IRAs David C. John The Heritage Foundation The Retirement Security Project Automatic Enrollment Works Legal since 1999. All legal questions resolved 2006. Most larger 401(k)s incorporate automatic

137 views • 13 slides
SWIFT: Using Task-Based Parallelism, Fully Asynchronous Communication and Vectorization to

SWIFT: Using Task-Based Parallelism, Fully Asynchronous Communication and Vectorization to

SWIFT: Using Task-Based Parallelism, Fully Asynchronous Communication and Vectorization to achieve maximal HPC performance Matthieu Schaller Research Assistant Institute for Computational Cosmology, Durham University, UK November 2016 This

597 views • 49 slides
Automatic Reasoning (AR) Beyond SAT and SMT Christoph Weidenbach Automatic Reasoning The

Automatic Reasoning (AR) Beyond SAT and SMT Christoph Weidenbach Automatic Reasoning The

Automatic Reasoning (AR) Beyond SAT and SMT Christoph Weidenbach Automatic Reasoning The science of developing systems that automatically test (un)satisfiability, validity of a logical formula. SAT: FOL: Post Correspondence Problem (PCP)

423 views • 29 slides
Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures uce,

Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures uce,

Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures uce, Erik Saule , Kamer Kaya, Ahmet Erdem Sary Umit V. C ataly urek The Ohio State University (BMI, CS, ECE) University of North Carolina at

848 views • 29 slides
Data Blocks: Hybrid OLTP and OLAP on Compressed Storage using both Vectorization and Compilation

Data Blocks: Hybrid OLTP and OLAP on Compressed Storage using both Vectorization and Compilation

Data Blocks: Hybrid OLTP and OLAP on Compressed Storage using both Vectorization and Compilation Harald Lang 1 , Tobias Mhlbauer 1 , Florian Funke 2, , Peter Boncz 3, , Thomas Neumann 1 , Alfons Kemper 1 1 Technical University Munich,

581 views • 24 slides
Unication of static analyses and runtime measurements for improving vectorization Ashay Rane,

Unication of static analyses and runtime measurements for improving vectorization Ashay Rane,

Unication of static analyses and runtime measurements for improving vectorization Ashay Rane, Rakesh Krishnaiyer, Chris Newburn, James Browne, Leo Fialho and Zakhar Matveev th 4 August, 2014 Petascale Tools Workshop 1 Overview of this

430 views • 26 slides
Optimization &amp; vectorization UU Crowd Simulation Software Roland Geraerts October 14, 2019

Optimization &amp; vectorization UU Crowd Simulation Software Roland Geraerts October 14, 2019

Optimization &amp; vectorization UU Crowd Simulation Software Roland Geraerts October 14, 2019 Unity3D plugin However Global framework Agents are simulated in parallel using OpenMP Real-time performance UUCS: simulates 15K

621 views • 33 slides
A Rewriting System for the Vectorization of Signal Transforms Franz Franchetti Yevgen Voronenko

A Rewriting System for the Vectorization of Signal Transforms Franz Franchetti Yevgen Voronenko

A Rewriting System for the Vectorization of Signal Transforms Franz Franchetti Yevgen Voronenko Markus Pschel Department of Electrical &amp; Computer Engineering Carnegie Mellon University http://www.spiral.net Supported by: NSF

535 views • 20 slides
Rethinking SIMD Vectorization for In-Memory Databases Sri Harshal Parimi Motivation Need for

Rethinking SIMD Vectorization for In-Memory Databases Sri Harshal Parimi Motivation Need for

Rethinking SIMD Vectorization for In-Memory Databases Sri Harshal Parimi Motivation Need for fast analytical query execution in systems where the database is mostly resident in main memory. Architectures with SIMD capabilities, like (Many

717 views • 24 slides
Advice Automatic Structures and Uniformly Automatic Classes Faried Abu Zaid 1 , Erich Grdel 2 ,

Advice Automatic Structures and Uniformly Automatic Classes Faried Abu Zaid 1 , Erich Grdel 2 ,

Advice Automatic Structures and Uniformly Automatic Classes Faried Abu Zaid 1 , Erich Grdel 2 , Frederic Reinhardt 2 1 TU Ilmenau 2 RWTH Aachen University 1 / 17 Automatic Structures Idea: present structure by automata d = ( A D , A , ( A R

422 views • 17 slides
An Embedded Domain Specific Lanaguage for General Purpose Vectorization Przemysaw Karpiski

An Embedded Domain Specific Lanaguage for General Purpose Vectorization Przemysaw Karpiski

An Embedded Domain Specific Lanaguage for General Purpose Vectorization Przemysaw Karpiski (CERN, NUIM) John McDonald (NUIM) Performance Portable Programming Models for Accelerators (P^3MA) Frankfurt, Germany, June 22, 2017 What to

339 views • 23 slides

More recommend