www.iaik.tugraz.at S C I E N C E P A S S I O N T E C H N O L O G Y Protecting RISC-V Processors against Physical Attacks Stefan Mangard, Robert Schilling, Thomas Unterluggauer, Mario Werner Graz University of Technology March 28 th , 2019 u www.iaik.tugraz.at
www.iaik.tugraz.at Attack Settings I/O Network Computer System Processor RAM Interfaces 2 Graz University of Technology
www.iaik.tugraz.at Classic Setting: Attacks Via The (Network) Interfaces I/O Network Computer System Processor RAM Interfaces 3 Graz University of Technology
www.iaik.tugraz.at Classic Setting: Attacks Via The (Network) Interfaces I/O Network Computer System Processor RAM Interfaces 4 Graz University of Technology
www.iaik.tugraz.at The Secure Processor Setting I/O Network RAM Processor Interfaces Memory Encryption 5 Graz University of Technology
www.iaik.tugraz.at Physical Attack Setting: Also Processor is Attacked I/O Network RAM Processor Interfaces Example attacks: power analysis, fault attacks, … 6 Graz University of Technology
www.iaik.tugraz.at Small Faults – Big Effects 1 bit determines your privilege level determines your access rights determines whether a password is considered correct or not Changes completely the meaning of an opcode … 7 Graz University of Technology
www.iaik.tugraz.at Fault Attacks - Relevance Traditional fields secure elements smart cards, … New fields: IoT, automotive, etc. Example: Privilege escalation on Linux (Niek Timmers, Cristofaro Mune: Escalating Privileges in Linux Using Voltage Fault Injection. FDTC 2017: 1-8) 8 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – How? Rowhammer Most popular techniques Voltage glitches Laser Effects Changes in data, pointers, … Changes in program flow: skip of instruction pointer, induction of branches, … 9 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – What Can We Do? 10 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – What Can We Do? Control flow graph integrity Mario Werner, Thomas Unterluggauer, David Schaffenrath , Stefan Mangard. “Sponge - Based Control-Flow Protection for IoT Devices”. In: Euro S&P 2018 11 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – What Can We Do? Branch Integrity Robert Schilling, Mario Werner, Stefan Mangard. “Securing Conditional Branches in the Presence of Fault Attacks”. In: DATE 2018 12 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – What Can We Do? Memory Access Robert Schilling, Mario Werner, Pascal Nasahl , Stefan Mangard. “Pointing in the Right Direction- Securing Memory Accesses in a Faulty World”. In: ACSAC 2018 13 Graz University of Technology
www.iaik.tugraz.at Fault Attacks – What can we do? 14 Graz University of Technology
www.iaik.tugraz.at Sponge-Based Control-Flow Protection 15 Graz University of Technology
www.iaik.tugraz.at Control Flow Integrity is Critical Robert Schilling 16 Graz University of Technology
www.iaik.tugraz.at Control Flow Integrity is Critical Robert Schilling 17 Graz University of Technology
www.iaik.tugraz.at Control Flow Integrity is Critical Robert Schilling 18 Graz University of Technology
www.iaik.tugraz.at Control Flow Integrity is Critical Robert Schilling 19 Graz University of Technology
www.iaik.tugraz.at Control Flow Integrity is Critical Robert Schilling 20 Graz University of Technology
www.iaik.tugraz.at Main Idea Sponge-based Control-Flow Protection (SCFP) Hardware supported CFI scheme Encrypts the instruction stream with small granularity Program can only be decrypted correctly as long it is executed correctly Costs Highly configurable in terms of security and cost RV32IM AEE-Light: ~10% runtime, ~20% code size Robert Schilling 21 Graz University of Technology
www.iaik.tugraz.at High Level Concept 22 Graz University of Technology
www.iaik.tugraz.at High Level Concept 23 Graz University of Technology
www.iaik.tugraz.at High Level Concept 24 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 25 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 26 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 27 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 28 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 29 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 30 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 31 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 32 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 33 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 34 Graz University of Technology
www.iaik.tugraz.at Decryption/Execution Example 35 Graz University of Technology
www.iaik.tugraz.at RISC-V ISA Integration - Branches Branches additional have an associated patch that is applied conditionally New BPEQ, BPNE, BPLT, BPLTU, BPGE, and BPGEU instructions 36 Graz University of Technology
www.iaik.tugraz.at RISC-V ISA Integration – Calls Direct Calls Indirect Calls 37 Graz University of Technology
www.iaik.tugraz.at Prototype Implementation LLVM-based toolchain RI5CY-based hardware AEE-Light with PRINCE in APE-like mode ~30kGE of area for SCFP at 100MHz in UMC65 ~10% runtime and ~20% code size overhead 38 Graz University of Technology
www.iaik.tugraz.at Protected Conditional Branches
www.iaik.tugraz.at Motivation Control-flow integrity (CFI) measures restrict the control-flow to valid execution traces PW check Branching decisions require extra protection Do Enter System Nothing Examples of critical applications Continue Password checks, signature verification, … 40 Graz University of Technology
www.iaik.tugraz.at Classical Conditional Branch 41 Graz University of Technology
www.iaik.tugraz.at Faulting Conditional Branches Fault the comparison Fault the operands Faulting the branch 42 Graz University of Technology
www.iaik.tugraz.at Design Goals Maximum flexibility concerning redundancy encoding of data (x, y) Arithmetic codes are efficient for number encoding Linear codes are used for strings Minimal changes to hardware 43 Graz University of Technology
www.iaik.tugraz.at Step 1: Encoded Comparison in Software Efficiently possible e.g. for AN Codes Output of comparison: n-bit symbol for true or n-bit symbol for false 44 Graz University of Technology
www.iaik.tugraz.at Step 1: Encoded Comparison in Software How to securely branch based on the n-bit symbol? 45 Graz University of Technology
www.iaik.tugraz.at Step 2: Use a standard branch for the actual branching Use a standard branch for the actual branching …. 46 Graz University of Technology
www.iaik.tugraz.at Step 3: Link Comparison Result to CFI State … and link it to the CFI state. 47 Graz University of Technology
www.iaik.tugraz.at Example: Protected Conditional Branch 1. Compute the encoded comparison 𝐽1 𝑇 1 2. Perform a conditional branch 𝑇 2 𝐽2 𝑇 3 𝑑𝑝𝑜𝑒 = EncCmp 3. At the branch target: Link the 𝑐𝑠 𝑑𝑝𝑜𝑒 = 𝑈𝑠𝑣𝑓 𝑇 4 redundant condition value with the CFI state ∗ ∗ 𝑇 6 𝑉𝑞𝑒𝑏𝑢𝑓(𝑑𝑝𝑜𝑒) 𝑉𝑞𝑒𝑏𝑢𝑓(𝑑𝑝𝑜𝑒) 𝑇 8 𝑇 6 𝑇 8 𝐽6 𝐽8 𝑇 7 𝑇 9 𝐽7 𝐽9 Wrong branch and wrong condition lead to invalid CFI state 48 Graz University of Technology
www.iaik.tugraz.at Prototype Evaluation Added new branch instruction to inject first operand to the CFI state LLVM-based toolchain Automatically identifies conditional branches Encodes dependent data-flow graph to AN-code domain Inserts software-based comparison algorithm Overhead on par with state-of-the-art duplication approaches 49 Graz University of Technology
www.iaik.tugraz.at Secure Memory Access 50 Graz University of Technology
www.iaik.tugraz.at Faulting the Pointer Memory Faulted pointer redirects Some data the memory access ptr Secret 51 Graz University of Technology
www.iaik.tugraz.at Faulting the Memory Access Memory Faulted pointer redirects Some data the memory access Faulting the memory ptr access itself leads to a wrong access Secret 52 Graz University of Technology
Recommend
More recommend
