More Moores Law through More Moore s Law through Computational - PowerPoint PPT Presentation

NSF DA Workshop - July 8 2009 NSF DA Workshop July 8, 2009 More Moore’s Law through More Moore s Law through Computational Scaling -- and EDA’s Role d EDA’ R l David Z. Pan Dept. of Electrical and Computer Engineering The University of Texas at Austin f dpan@ece.utexas.edu http://www cerc utexas edu/utda http://www.cerc.utexas.edu/utda 1

Scaling & Lithography Status 10 10 [Courtesy Intel] -nce 1 1 um 0 1 0.1 1990 2000 2020 1980 2010 [Courtesy Intel, 2006]  193nm litho continues to push its limit p › Immersion, extreme RET, DPL (Double Patterning Lithography)  NGL - Next Generation Lithography, still next generation › Economical/material/technical challenges E i l/ t i l/t h i l h ll 2

A Famous (or Infamous?) Projection DFM to Rescue [Courtesy Synopsys] [Courtesy Synopsys]  Scaling, though challenged, still pushing!  But more important role in computational scaling 3

Computational Scaling  Not just by equipment advancement  Computational scaling › Scaling enabled by massive computational power › Fast computers to help design faster computers  Computational lithography for nanolithography systems › Computationally reverse-engineering C t ti ll i i  Electronic design automation (EDA) eco-system to close the gaps to close the gaps › Synergistic Process-Layout-Circuit Co-Optimization › Parallel multi-core GPU domain-specific FPGA › Parallel, multi core, GPU, domain specific, FPGA… 4

Computational Lithography Intel’s Pixelated Mask [Si [Singh+, SPIE’08) h+ SPIE’08)  Other examples: › Variational litho-modeling [Yu+, DAC’06, JM3’07] › IBM: source mask optimization 5

Computational Nanolithography  We do have massive computational power! › IBM BlueGene, Brion/ASMLTachyon (FPGA acceleration), Gauda (leveraging cheap GPU), … l ti ) G d (l i h GPU)  Make a trillion pixels dance [Singh+, SPIE’08] Still There's Plenty of Room at the Bottom There's Plenty of Room at the Bottom - An Invitation to Enter a New Field of Physics Richard P. Feynman, 1959 6

Synergistic Process-Layout-Ckt Co-Opt Shape/Electrical Optimization Higher Level Opt. g p DFM Clock Syn. DFM P & R DFM Cell Lib/Fabric DFM Cell Lib/Fabric Predictive Modeling Predictive Modeling OPC/RET Var. Si-image Model Var. Electrical Model Shape/Electrical Analysis (litho, CMP, etc) 7

Synergistic Optimizations  Need good levers at different levels of abstraction for process/layout/circuit co-opt. Design Design “Give me a place to stand on, and I can move the EDA Lever Lever earth. earth ” - Archimedes Lever Archimedes’ Lever “Give me a lever, and I can optimize your billion transistor design.” - EDA’s Lever (model/rule) i d i ” EDA’ L ( d l/ l ) 8

Process Modeling  How complicated?              ' ' ' ' I I ( ( x x y y ) ) J J ( ( x x x x y y y y ) ) F x F x ( ( y y ) ) F F ( ( x x y y ) ) I 1 1 0 0 0 0 0 0 0 0 0 Litho model:         ' ' ' ' K x ( x y y ) K ( x x y y ) dx dy dx dy Hopkins eqn 1 0 1 0 1 0 1 0 0 0 0 0  or simple can it be? 2 Metal Metal _ density density CMP model:    C Cu _ Thickness Th k * * ( ( 1 1 ) ) [Cho+, ICCAD’06]   Key Issues:  Key Issues: › Accuracy vs. Fidelity (Elmore-like) › Design-oriented vs. process-oriented g p 9

Prediction & Prescription Hotspot! Layout! y  Prediction: e.g., statistical modeling [Cho+, DAC’08], machine learning [Ding+, ICICDT’09]  Prescription: only work with patterns that are printable  Prescription: only work with patterns that are printable 10

E.g., Post-OPC Predictive Modeling [Cho+, DAC’08] 1 n Result 0.8 0.6 0.6 Simulation Higher correlation 0.4 in more macro level, 0.2 0 0 1 0 0.2 0.4 0.6 0.8 1 Litho Metric ation Result 0.8 R=0.90, 16x16um 2 0.6 Simulati 0.4 0.4 0.2 0 0 0 0.2 0.2 0.4 0.4 0.6 0.6 0.8 0.8 1 1 Litho Metric Litho Metric R=0.95, 32x32um 2  Very high macro-level fidelity y g y 11

Moving Up: System/High-Level and Logic/Physical-Level Co-design Logic System Co-design Physical System Profiling Variation Modeling High-Level Level Design guidance from Synthesis planning physical reality  Variation budgeting with system-level profiling  Variation budgeting with system level profiling 12

Moving Dow n: Design for Equipment Equipment Characteristics Tunable Parameters  Timing optimization using ASML dose mapper [Jeong, Kahng+ DAC’08]  Combine DFM and APC (advanced process control)  Combine DFM and APC (advanced process control) [Pan+, JPC’08] 13

The Moore, The Better  There is still plenty of life for Moore’s Law  Bigger role of Computational Scaling and EDA t to extend the Moore’s Law t d th M ’ L  NO EXPONENTIAL IS FOREVER…  BUT  WE CAN DELAY “FOREVER” Moore’s Law Amendment [Moore 2003] [Moore 2003] [Moore 1965] 14