ICP Etching Process Improvement by in-situ metrology Tom Thieme Director Marketing & Sales / LayTec Dr. Andreas Thies Manager BEOL Technologies / FBH Berlin |
2 ICP Etching Process Improvement by in-situ metrology Issue of cracking wafers (3 ” and 4”): crack Non optimized ICP process results in SiC/GaN wafer cracking due to vertical strain in the carrier/bonding-layer/SiC/GaN structure | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
3 ICP Etching Process Improvement by in-situ metrology Equipment configuration - Sentech ICP etching system LayTec EpiCurve system - etch bias strongly depends on carrier attached to the view-port: - etch rate strongly depends on carrier - Platen temperature 100... 150 ° C backside cooling, p = 1000 Pa Sentech web side: ICP-RIE plasma etcher SI 500 | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
4 ICP Etching Process Improvement by in-situ metrology Stress evolution during constant etching conditions During constant etching conditions stress is incorporated due to temperature gradient of wafer | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
5 ICP Etching Process Improvement by in-situ metrology Stress evolution during various etching conditions During constant temperature stress is incorporated due to varying etching conditions | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
6 ICP Etching Process Improvement by in-situ metrology Optimized etching process using in-situ products Using curvature measurement, etching process could be optimized No wafer damage anymore = safe time and cost! | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
7 ICP Etching Process Improvement by in-situ metrology Optimized etching process using in-situ products Backside Frontside (black marks are artefacts due to photography and depend on angle of the shot | October 30th, 2014 ICP Etching Process Improvement by in-situ metrology
Knowledge is key www.laytec.de |
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