Lets port together. Debian fun for everyone. Peter De Schrijver - PowerPoint PPT Presentation

Let’s port together. Debian fun for everyone. Let’s port together. Debian fun for everyone. Peter De Schrijver ”Most civilised people are out of touch with reality because Outline they confuse the world as it is with the world as they think about it, talk about it and describe it.” Peter De Schrijver p2@debian.org February 24, 2007

Overview I Let’s port together. Debian fun for Portability issues everyone. why ? Peter De Schrijver C types Bitfields Outline Endianness Alignment Accesing peripheral hardware Example system architectures Trends in system design Out of order transactions Non-coherent I/O Userland hardware access

Why ? Let’s port together. Debian fun for everyone. Peter De Schrijver ◮ Correctness Portability ◮ Debian is ”The Universal Operating System” Why ? C types ◮ Debian is the most used Embedded Distribution Bitfields Endianness ◮ Hardware advances will make Debian feasible on new Alignment Peripherals platforms Architectures Trends ◮ It’s enlightening to see and play with other Out of order I/O architectures/systems Userland

C types Let’s port together. Debian fun for ◮ ANSI-C everyone. ◮ sizeof(char) < = sizeof(short) < = sizeof(int) < = Peter De Schrijver sizeof(long) ◮ short and int are at least 16bit Portability ◮ long is at least 32bit Why ? C types ◮ sizeof(ptr) ! = sizeof(int) Bitfields Endianness ◮ signedness of chars is arch dependent Alignment ◮ Tips Peripherals Architectures ◮ use int as much as possible for computations, loop Trends Out of order variables,... I/O Userland ◮ use ISO C99 types (u int8, u int16, u int32, ...) for external comms ◮ don’t abuse chars to ’save memory’ ◮ use the latest gcc version with -Wall

Bitfields Let’s port typedef struct bitfields together. Debian fun for { everyone. unsigned char bitfield0:3; Peter De Schrijver unsigned char bitfield1:5; } Portability Why ? C types Bitfields IA32 representation : Endianness Alignment Peripherals Architectures 7 6 5 4 3 2 1 0 Trends Out of order I/O Userland PowerPC representation : 0 1 2 3 4 5 6 7

Endianness Let’s port together. Debian fun for everyone. Consider 0x12345678 Peter De Schrijver Little endian : 0x78 0x56 0x34 0x12 Portability Why ? C types Big endian : 0x12 0x34 0x56 0x78 Bitfields Endianness Alignment Peripherals PDP endian : 0x34 0x12 0x78 0x56 Architectures Trends Out of order ◮ External interfaces I/O Userland ◮ Use macros to convert between CPU and specific endianess

Alignment Let’s port together. Debian fun for everyone. Peter De ◮ Most RISC cpus require aligned accesses Schrijver ◮ Unaligned accesses are trapped (mostly) Portability ◮ slow Why ? C types ◮ not possible in kernel land Bitfields Endianness ◮ Unaligned accesses are seldomly atomic with respect to Alignment Peripherals SMP/other bus masters Architectures Trends ◮ Better Out of order I/O ◮ avoid them Userland ◮ have the compiler generate the code

Intel style system Let’s port together. Debian fun for everyone. CPU CPU Peter De Schrijver Portability Why ? C types Bitfields Memory North Endianness subsystem bridge Alignment Peripherals Architectures Trends Out of order I/O Userland Device Device Device

Intel style system Let’s port together. Debian fun for everyone. Peter De ◮ Main components Schrijver ◮ CPU complex Portability ◮ Northbridge Why ? C types ◮ Southbridge Bitfields Endianness ◮ Memory subsystem Alignment ◮ Main interfaces Peripherals Architectures ◮ Frontside bus Trends Out of order ◮ PCI I/O Userland ◮ AGP

Opteron style system Let’s port together. Debian fun for everyone. Peter De Schrijver Memory Memory CPU CPU subsystem subsystem Portability Why ? C types Bitfields HT PCIe HT PCIe Endianness bridge bridge Alignment Peripherals Architectures Trends Out of order Device I/O Device Device Device Device Device Userland

Opteron style system Let’s port together. Debian fun for everyone. Peter De Schrijver ◮ Main components ◮ CPU Portability Why ? ◮ Hypertransport - PCIe bridge C types Bitfields ◮ PCIe - PCI bridge Endianness Alignment ◮ Main interfaces Peripherals ◮ Hypertransport Architectures Trends ◮ PCIe Out of order I/O ◮ PCI Userland

Trends in system design Let’s port together. Debian fun for everyone. Peter De ◮ Observations Schrijver ◮ CPUs became much faster then memory Portability ◮ bus and memory bandwidth have gone up faster then Why ? latencies C types Bitfields ◮ parallel busses become very hard at high speeds Endianness Alignment ◮ Solutions Peripherals ◮ Caches Architectures Trends ◮ Burstmode transfers Out of order I/O ◮ Advanced DMA Userland ◮ multiple highspeed serial links

Out of order transactions Let’s port together. ◮ examples Debian fun for everyone. ◮ CPU ◮ bus bridges Peter De Schrijver ◮ use read/write barriers Portability ◮ CPU instructions Why ? ◮ ”magic” reads C types Bitfields Endianness Alignment possibly out of order : Peripherals stw r20,0x20(r21) Architectures Trends stw r22,0x24(r21) Out of order I/O Userland always in order : stw r20,0x20(r21) eieio stw r22,0x24(r21)

Non-coherent I/O Let’s port together. Debian fun for everyone. Peter De Schrijver ◮ Some systems do not support ”bus snooping” ◮ Invalidate cachelines Portability Why ? ◮ network traffic C types Bitfields ◮ disk buffers Endianness Alignment ◮ other kinds of streaming I/O Peripherals ◮ non-cacheable memory Architectures Trends ◮ microcode Out of order I/O ◮ ring buffers Userland

Addressing Let’s port together. Debian fun for everyone. ◮ Virtual addresses Peter De Schrijver ◮ Physical addresses Portability ◮ Bus addresses Why ? ◮ Translation Physical to Bus addresses C types Bitfields Endianness ◮ identity mapped Alignment ◮ fixed offset Peripherals ◮ page based translation Architectures Trends ◮ not memory mapped Out of order I/O ◮ IA32 I/O ports Userland ◮ PowerPC DCB ◮ Always access hardware via special functions

Transaction atomicity Let’s port together. Debian fun for everyone. Peter De ◮ Multiple CPUs Schrijver ◮ other busmasters (eg. on PCI) Portability Why ? ◮ reads and writes are atomic only if aligned C types Bitfields ◮ atomic read/modify/write is CPU specific Endianness Alignment ◮ ia32: lock prefix on specific instructions Peripherals ◮ mips: ll/sc Architectures Trends ◮ arm: swap Out of order ◮ ppc: lwarx/stwcx I/O Userland ◮ bridges may break locks

Userland hardware access Let’s port together. Debian fun for everyone. Peter De Schrijver ◮ Hardware access from userland is problematic Portability ◮ Seperate command transport from driver logic Why ? C types ◮ Firewire : libraw1394 Bitfields Endianness ◮ USB : libusb Alignment ◮ SCSI and ATAPI : scsi generic like ioctl Peripherals ◮ ... Architectures Trends Out of order ◮ Provide abstraction layer for accessing hardware I/O Userland