Electrical control of magnetism in semiconductors F. Matsukura 1,2 , - PowerPoint PPT Presentation

JST-DFG Workshop on Nanoelectronics Aachen, Germany, March 5-7, 2008 Electrical control of magnetism in semiconductors F. Matsukura 1,2 , D. Chiba 2,1 , Y. Nishitani 1 , M. Endo 1 , and H. Ohno 1,2 1 Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication, Tohoku University 2 Semiconductor Spintronics Project, ERATO-JST Outline ・ Introduction (field effect transistor with a magnetic semiconductor channel) ・ Thickness dependence ・ Mn composition dependence ・ Summary Discussion with M. Sawicki and T. Dietl (Polish Academy of Sciences)

Semiconductor Spin-electronics (Spintronics) Spin-related phenomena in semiconductors → an additional degree of freedom (spin + charge → spintronics ) new functional devices utilizing nuclear spin controllability of spin dynamics, laser coherence, and magnetism carrier spin spin spin magnetic spin electric field electronics electronics optics optics and/or current semiconductor In order to enhance spin-related phenomena in semiconductors · alloy system with host semiconductor and guest magnetic ion (diluted magnetic semiconductors; DMSs) � Multifunctional materials � � �

III-V Based Magnetic Semiconductors · Combine present day electronic device materials with magnetism · Low solubility of magnetic elements overcome by low-temperature molecular beam epitaxy (LT-MBE) Mn Ga As New materials can be synthesized under non-equilibrium growth condition

III-V Based Magnetic Semiconductors · Combine present day electronic device materials with magnetism · Low solubility of magnetic elements overcome by low-temperature molecular beam epitaxy (LT-MBE) First III-V Based Magnetic Semiconductor (In,Mn)As: H. Munekata et al ., Phys. Rev. Lett. 63 , 1849 (1989). Ferromagnetism (In,Mn)As: H. Ohno et al ., Phys Rev. Lett. 68 , 2664 (1992). (Ga,Mn)As: H. Ohno et al ., Appl. Phys. Lett. 69 , 363 (1996). Mn acts simultaneously as an acceptor and as a magnetic spin

p-d Zener Model carrier spins Mn spins M ≠ 0 β p-d exchange interaction Interaction (p-d exchange interaction) between holes and Mn spins induces the spin-splitting of valence band � Energy gain by repopulation of holes between spin subbands stabilizes ferromagnetism ( ) ( ) + ρ β 2 xN S S 1 A E = Curie temperature: 0 F S F T c 12 k B T. Dietl, H. Ohno, F. Matsukura, J. Cibert, and D. Ferrand, Science 287 , 1019 (2000). T. Dietl, H. Ohno, and F. Matsukura, Phys. Rev. B 63 , 195205 (2001).

Comparison of Experimental and Calculated T C 100 exp, cal , (Ga,Mn)As, x = 0.053 T C (K) , (In,Mn)As, x = 0.03 10 , (Zn,Mn)Te, x eff = 0.015 1 19 20 10 10 -3 ) p (cm larger T C for larger p quantitative agreement between experiment and calculation exp.: (Ga,Mn)As:T. Omiya et al ., Physica E 7 , 976 (2000). (In,Mn)As: D. Chiba et al ., J. Supercond. and Novel Mag.16, 179 (2003). (Zn,Mn)Te: D. Ferrand et al ., Phys. Rev. B 63 , 085201 (2001).

Control of magnetism of ferromagnetic semiconductors by external means optical means 80 T C as a function of p before after 40 M (mT) irradiation 0 5 K (In,Mn)As temperature, T -40 x = 0.06 paramagnetism ferromagnetism -80 before irradiation after irradiation -0.3 0.0 0.3 µ 0 H (T) electron h ν photo-generated E C h ν carriers E F hole E V (In,Mn)As GaSb hole concentration, p isothermal control of magnetism S. Koshihara et al ., Phys. Rev. Lett. 78 , 4617 (1997).

Control of magnetism of ferromagnetic semiconductors by external means electrical means 50 V g (V) T C as a function of p 0 25 R Hall ( Ω ) +125 -125 0 0 (In,Mn)As temperature, T -25 22.5 K x = 0.03 paramagnetism ferromagnetism -50 ( E G > 0) ( E G < 0) -1.0 -0.5 0.0 0.5 1.0 µ 0 H (mT) field-effect transistor hole concentration, p isothermal control of magnetism H. Ohno et al ., Nature 408 , 944 (2000).

Previous result on FET with (Ga,Mn)As channel Hall resistance sample structure gate metal 100 nm Au / Cr gate Insulator 50 nm Al 2 O 3 channel 7 nm Ga 0.863 Mn 0.047 As 7 nm GaAs 30 nm Al 0.8 Ga 0.2 As buffer 500 nm In 0.13 Ga 0.87 As 100 nm GaAs substrate S.I. GaAs (001) sub. Arrott-plot analysis FET device with Hall-bar shape ∆ ∆ ∆ ∆ T C ~ 5 K 30 µ m D. Chiba et al ., Appl Phys Lett 89 , 162505 (2006).

This work 1. FETs with (Ga,Mn)As channel and gate insulator (Al 2 O 3 or HfO 2 ) deposited by atomic layer deposition (ALD) Atomic Layer Deposition (ALD) 2. T C & ∆ T C of (Ga,Mn)As channels in FET · Channel thickness dependence · Mn composition dependence

Au/insulator/Au capacitors 1.0 V = R Device structure C π 2 f R V side view C C (nF) HfO 2 capacitor 0.5 Al 2 O 3 Au Au C / A SI-GaAs sub. 0.0 top view 0.00 0.05 0.10 0.15 0.20 2 ) insulator A (mm ∆ E = ± 5 MV/cm t channel = 5.0 nm Au Au ∆ p ideal d ⋅ C 3 κ = -3 ) ε A 20 cm Measurement 0 2 Al 2 O 3 ∆ p (x10 10 k Ω κ ~ 7.47 V R lock-in HfO 2 100 mV 1 κ ~ 20.17 1 kHz ALD 0 V C lock-in 0 10 20 30 Sample κ A : area of capacitor, d : thickness of insulator M. J. Biercuk et al. Appl. Phys. Lett. 83 , 2405 (2003).

(Ga,Mn)As FETs typical sample structure Evaporation metal 100/5 nm Au/Cr insulator 50 or 40 nm Al 2 O 3 or HfO 2 V G ALD strain induced channel 5.0 nm Ga 0.949 Mn 0.051 As perpendicular 5.0 nm GaAs magnetic easy axis MBE 30 nm Al 0.80 Ga 0.20 As buffer consistent with 500 nm In 0.15 Ga 0.85 As the p-d Zener model 30 nm GaAs substrate S.I. GaAs substrate (001) FET fabrication ·Mesa structure with Hall bar geometry FET device with Hall-bar shape photolithography and wet etching ·Gate insulator S G D ALD ·Metal gate 30 µ m evaporation and lift-off

(Ga,Mn)As FETs Measurement anomalous Hall effect V V Hall R R = µ + 0 S R H M t : channel thickness D ⊥ Hall 0 t t V I SD = 1 µ A V sheet I SD T = 10 ~ 250 K S G | µ 0 H| ≤ 0.5 T µ µ µ µ 0 H ext |E| ≤ 5 MV/cm V Gate κε ∆ = E dependence of R sheet 0 p ( E ) E et [ ] ( ) − = µ + ∆ 1 R et p p E 5 -1 ) sheet ( ) x = 0.05 -5 Ω = µ − κε ept E 0 α Al 2 O 3 t = 5 nm -1 (x10 4 µ = − slope α α α α ε κ 0 R sheet 3 T =20 K ( ) 1 1 = p E -5.0 -2.5 0.0 2.5 5.0 µ et R sheet E ( ) E (MV/cm)

(Ga,Mn)As FET Magnetotransport properties 1.0 R R 40 K = µ + Al 2 O 3 0 S R H M ⊥ 60 K Hall 0 t t 50 K 0.5 x = 0.05 70 K R Hall (k Ω ) t = 5 nm 1.0 80 K 0.0 Al 2 O 3 0 MV/cm E = 0 -0.5 -1.0 -5 MV/cm R Hall (k Ω ) -0.50 -0.25 0.00 0.25 0.50 0.5 µ 0 H (T) Arrott plots T C = 56.4 K 54 K Al 2 O 3 0.6 55 K 56 K 5 MV/cm 2 ) 2 (k Ω 0.4 0.0 57 K 44 46 48 50 52 54 56 58 60 62 58 K R Hall 0.2 T (K) E = 0 V/cm ∆ T C = 6.1 K 0.0 0.0 0.2 0.4 0.6 0.8 µ 0 H / R Hall (T/k Ω )

channel thickness dependence

(Ga,Mn)As FETs with different channel thickness Sample structure R sheet - T metal 100/5 nm Au/Cr 3.5, 4.0, 4.5, 5.0 nm insulator 40 nm Al 2 O 3 channel t nm Ga 0.935 Mn 0.065 As -1 E = 0 10 5.0 nm GaAs 30 nm Al 0.75 Ga 0.25 As x = 0.065 buffer ρ ( Ω cm) 500 nm In 0.15 Ga 0.85 As 30 nm GaAs substrate S.I. GaAs substrate (001) t = 3.5, 4.0, 4.5, and 5.0 nm -2 insulating 10 metallic κε ∆ = 0 p ( E ) E et 0 100 200 ∆ p for thinner layer → larger ∆ T C T (K)

(Ga,Mn)As FETs with different channel thickness Typical results E dependence R sheet - T 1.0 10 K 4.5 nm -5 MV/cm x = 0.065 1.0 50 K 60 K 0.5 0 V/cm 0.5 70 K R Hall (k Ω ) +5 MV/cm R Hall (k Ω ) 0.0 0.0 80 K -0.5 -0.5 60 K 4.5 nm -1.0 0 V/cm -1.0 -0.1 0.0 0.1 -50 0 50 µ 0 H (T) µ 0 H (mT)

(Ga,Mn)As FETs with different channel thickness Curie temperature 0.6 -5 MV/cm 3.5 nm x = 0.065 5 MV/cm 0 MV/cm 0.0 30 35 40 45 50 0.8 Hall (k Ω ) 4.0 nm 0.0 40 45 50 55 60 1.1 s R 4.5 nm 0.0 50 55 60 65 70 0.4 5.0 nm 0.0 70 75 80 85 90 T (K) larger T C and smaller ∆ T C for thicker chnnael

(Ga,Mn)As FETs with different channel thickness Hole concentration & Curie temperature 20 ) (x10 100 3 x = 0.065 80 T C (K) -3 ) 2 p (cm 60 1 40 0 16 0.9 12 ∆ T C (K) -3 ) 0.8 ∆ p (cm 8 0.7 4 0 0.6 5 4.5 4 3.5 5 4.5 4 3.5 t (nm) t (nm) FETs with thinner channel have larger ∆ T C as well as ∆ p

Mn composition dependence

Growth of Ga 1- x Mn x As with High x (~ 0.2 ) Channel layer 5 nm Ga 0.8 Mn 0.2 As [-110] azimuth 4 nm GaAs 30 nm Al 0.75 Ga 0.25 As Buffer layer 420 nm In 0.15 Ga 0.85 As 30 nm GaAs Substrate S.I. GaAs (001) sub. 1.0 Ga 0.8 Mn 0.2 As � decrease T S 0.5 M / M S etc. � thinner layer 0.0 -0.5 T =20 K -1.0 -0.4 -0.2 0.0 0.2 0.4 Single phase Ga 1- x Mn x As with µ 0 H (T) higher x D.Chiba et al ., Appl. Phys. Lett. 90 , 122503 (2007). S. Ohya et al ., Appl. Phys. Lett. 90 , 112503 (2007).

(Ga,Mn)As FETs with various Mn compositions Gate electrode 100 nm Cr / Au evaporation V G Gate insulator 40 nm HfO 2 ALD Channel layer 4.0 nm Ga 1- x Mn x As 4.0 nm GaAs MBE 30 nm Al 0.75 Ga 0.25 As Buffer layer 420 nm In 0.15 Ga 0.85 As 30 nm GaAs Substrate S. I. GaAs substrate (001) V V Hall 0.075 D 0.100 V x = 0.125 V sheet 0.175 I SD (const.) 0.200 S G µ µ 0 H ext µ µ annealed at 180 o C for 5 min V Gate