BEYOND STANDARDS: A NEW GPU-AWARE IMAGE CODING SYSTEM Pablo Enfedaque
GPU Technology Conference April 4 - 7, 2016 Ph.D. Advisors Francesc Aulí-Llinàs Juan C. Moure Universitat Autònoma de Barcelona
Table of contents 4. RESULTS PROBLEM CONCLUSIONS SOLUTION
PROBLEM
PROBLEM Image Coding Evolution Computational complexity GPU JPEG2000 Image data + Enhanced compression + Region-of-interest coding + Interactive transmission + Error resilience + Progressive lossy-to-lossless 1990 Now
PROBLEM JPEG2000 Coding Pipeline Arithmetic Data Bitstream BPC Transformation Reorganization Coder Compressed file 80% Computational time
PROBLEM Bitplane Coder Data Transformation
PROBLEM Bitplane Coder
SOLUTION
SOLUTION The Proposal BPC-PaCo JPEG2000 (BPC with Parallel Coefficient processing) N Stripes N Arithmetic coders Arithmetic coder
SOLUTION BPC-PaCo New mechanisms New mechanisms - - Stripes subdivision Stripes subdivision - - Parallel scanning order Parallel scanning order - - Static probability model Static probability model - - Adapted context formation Adapted context formation - - Fixed-length arithmetic coding Fixed-length arithmetic coding - - Cooperative bitstream Cooperative bitstream generation generation
SOLUTION CUDA implementation
RESULTS
RESULTS Coding performance -2%
RESULTS Computational performance Encoder Decoder CPU 8x Intel Xeon E5-4620 (64 HW threads) GPU GTX TITAN X x25 x95 5 satellite images 10240 x 10240 8 bit grey scale Kakadu GPU JPEG2K BPC-PaCo
RESULTS Power Efficiency CPU GTX TITAN X Tegra X1 x60 x40 Kakadu GPU JPEG2K BPC-PaCo
CONCLUSIONS
CONCLUSIONS JPEG2000 complexity BPC-PaCo parallelism 2% coding performance x25 SpeedUp
Additional information Publications Contact Pablo Enfedaque pablo.enfedaque@gmail.com Strategies of SIMD computing for image coding in GPU IEEE International Conference on High Performance Computing (HiPC) LinkedIn 2016 Francesc Aulí-Llinàs fauli@deic.uab.es Bitplane Image Coding With Parallel Coefficient Processing IEEE Transactions on Image Processing Juan C. Moure juancarlos.moure@uab.cat 2016 Strategy of microscopic parallelism for bitplane image coding IEEE Data Compression Conference (DCC) 2015 About us Implementation of the DWT in a GPU through a Register-based Strategy IEEE Transactions on Parallel & Distributed Systems 2014 http://gici.uab.es/GiciWebPage/ http://grupsderecerca.uab.cat/hpca4se/en/content/gpu
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